HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 264
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HD6437101
Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6437101.pdf
(560 pages)
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Section 8 Multifunction Timer Pulse Unit (MTU)
then a compare-match occurs with TGRA_3, and TCNT_3 and TCNT_4 are both cleared. At this
point, TSR’s overflow flag TCFV bit is not set.
Figure 8.81 shows a TCFV bit operation example in reset sync PWM mode with a set value for
cycle register TGRA_3 of H'FFFF, when a TGRA_3 compare-match has been specified without
synchronous setting for the counter clear source.
8.7.16
If overflow/underflow and counter clearing occur simultaneously, the TCFV/TCFU flag in TSR is
not set and TCNT clearing takes precedence.
Figure 8.82 shows the operation timing when a TGR compare match is specified as the clearing
source, and when H'FFFF is set in TGR.
Rev.1.00 Sep. 18, 2008 Page 230 of 522
REJ09B0069-0100
(H'FFFF)
TGRA_3
TCFV_3
TCFV_4
H'0000
Contention between Overflow/Underflow and Counter Clearing
TCNT_3 = TCNT_4
Figure 8.81 Reset Sync PWM Mode Overflow Flag
Counter cleared by compare match 3A
Not set
Not set
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