Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 185

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Z8FMC04100

Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet

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I
PS024604-1005
2
C Master/Slave Controller
Architecture
The I
devices are bus-compatible with the I
signal (SDA) and a serial clock signal (SCL) bidirectional lines. Features of the I
troller include:
Figure 27 illustrates the architecture of the I
Operates in MASTER/SLAVE or SLAVE ONLY modes
Supports arbitration in a multimaster environment (MASTER/SLAVE mode)
Supports data rates up to 400 Kbps
7- or 10-bit slave address recognition (interrupt only on address match)
Optional general call address recognition
Optional digital filter on receive SDA, SCL lines
Optional interactive receive mode allows software interpretation of each received ad-
dress and/or data byte before acknowledging
Unrestricted number of data bytes per transfer
Baud Rate Generator can be used as a general-purpose timer with an interrupt if the I
controller is disabled.
2
C Master/Slave Controller ensures that the Z8FMC16100 Series Flash MCU
P R E L I M I N A R Y
2
C protocol. The I
2
C controller.
2
C bus consists of the serial data
Product Specification
Architecture
2
C con-
2
C
163

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