Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 254

• Manufacturer Part Number: Z8FMC04100
• Description: Z8 Encore-R Motor Control Flash MCUs
• Manufacturer: ZILOG [Zilog, Inc.]

232
Z8 Encore!
Product Specification
Oscillator Control
Clock Source
Internal Precision
Oscillator
External Crystal/
Resonator/
External Clock
Drive
Internal Watchdog
Timer Oscillator
Clock Selection Following System Reset
Clock Failure Detection and Recovery for Primary Oscillator
®
Motor Control Flash MCUs
Unintentional accesses to the Oscillator Control Register (OSCCTL) can stop the chip by
switching to a nonfunctioning oscillator. Accidental alteration of the OSCCTL register is
prevented by a locking/unlocking scheme. To write the register, unlock it by making two
writes to the OSCCTL register with the values
OSCCTL register then changes the value of the register and returns the register to a locked
state. Any other sequence of oscillator control register writes has no effect. The values
written to unlock the register must be ordered correctly, but need not be consecutive. It is
possible to access other registers within the locking/unlocking operation.
The Internal Precision Oscillator is selected following a System Reset. Startup code after
the System Reset may change the system clock source by unlocking and configuring the
OSCCTL register. If the
Low Power mode is enabled during reset. When Flash Low Power mode is enabled during
reset, the
field of the OSCDIV register will be set to
The Z8FMC16100 Series Flash MCU generates a System Exception when a failure of the
primary oscillator occurs if the
tem function in this situation, the clock failure recovery circuitry automatically forces the
Characteristics
• 5.5296 MHz
• High precision possible when trimmed
• No external components required
• 0 to 20MHz
• Very high accuracy (dependent on
crystal/resonator or external source)
• Requires external components
• 10KHz nominal
• Low accuracy
• No external components required
• Low power consumption
FLPEN
Table 129. Oscillator Configuration and Selection
bit in the Oscillator Control Register (OSCCTL) will be set and the
LPDEN
P R E L I M I N A R Y
POFEN
bit in Program Memory Address 0001H is zero, Flash
bit is set in the OSCCTL Register. To maintain sys-
08h
E7H
.
Required Setup
• This is the reset default.
• Configure Option Bits for correct
• Unlock and write Oscillator Control
• Wait for required stabilization time
• Unlock and write Oscillator Control
• Unlock and write Oscillator Control
Register (OSCCTL) to enable and select
Internal WDT oscillator
external oscillator mode
Register (OSCCTL) to enable external
oscillator
Register (OSCCTL) to select external
oscillator
followed by
18H
. A third write to the
PS024604-1005
DIV