Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 265
Z8FMC04100
Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8FMC04100.pdf
(402 pages)
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PS024604-1005
Debug Mode
OCD Data Format
The operating characteristics of the Z8FMC16100 Series Flash MCU device in DEBUG
mode are:
•
•
•
•
•
Entering Debug Mode
The device enters DEBUG mode following any of the following operations:
•
•
•
•
•
Exiting Debug Mode
The device exits DEBUG mode following any of the following operations:
•
•
•
•
•
The On-Chip Debugger (OCD) interface uses the asynchronous data format defined for
RS-232. Each character is transmitted as 1 start bit, 8 data bits (least-significant bit first),
and 1 stop bit. See Figure 44.
The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to ex-
ecute specific instructions
The system clock operates unless in STOP mode
All enabled on-chip peripherals operate unless in STOP mode or otherwise defined by
the on-chip peripheral to disable in DEBUG mode
Automatically exits HALT mode
Constantly refreshes the Watch-Dog Timer, if enabled
Writing the DBGMODE bit in the OCD Control Register to 1 using the OCD interface
eZ8 CPU execution of a BRK (break point) instruction (when enabled)
Match of PC to OCDCNTR register (when enabled)
OCDCNTR register decrements to
The DBG pin is Low when the device exits Reset
Clearing the DBGMODE bit in the OCD Control Register to 0
Power-on reset
Voltage Brown Out reset
Asserting the RESET pin Low to initiate a Reset
Driving the DBG pin Low while the device is in STOP mode initiates a System Reset
P R E L I M I N A R Y
0000h
(when enabled)
Z8FMC16100 Series Flash MCU
Product Specification
Debug Mode
243
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