Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 193

no-image

Z8FMC04100

Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8FMC04100AKEG
Manufacturer:
Zilog
Quantity:
490
Part Number:
Z8FMC04100AKEG
Manufacturer:
Zilog
Quantity:
10 000
Part Number:
Z8FMC04100AKSG
Manufacturer:
Zilog
Quantity:
245
Part Number:
Z8FMC04100AKSG
Manufacturer:
Zilog
Quantity:
10 000
Part Number:
Z8FMC04100QKEG
Manufacturer:
Zilog
Quantity:
490
Part Number:
Z8FMC04100QKSG
Manufacturer:
Zilog
Quantity:
979
PS024604-1005
S
Address
Slave
Figure 28. Data Transfer Format—Master Write Transaction with a 7-Bit Address
Master Write Transaction with a 7-Bit Address
Figure 28 illustrates the data transfer format from a master to a 7-bit addressed slave
The procedure for a master transmit operation to a 7-bit addressed slave is as follows:
1. The software initializes the
2. The software asserts the
3. The I
4. The software responds to the TDRE bit by writing a 7-bit slave address plus the Write
5. The software sets the
6. The I
7. The I
8. After one bit of the address has been shifted out by the SDA signal, the transmit inter-
9. The software responds by writing the transmit data into the I
10. The I
11. The I
S
W
A
A
P
SLAVE mode with either a 7- or 10-bit slave address. The
address width for this mode when addressed as a slave (but not for the remote slave).
The software asserts the IEN bit in the I
rupts.
bit (which is cleared to 0) to the I
ister.
rupt asserts.
SDA signal.
high period of SCL. The I
Start
Write
Acknowledge
Not Acknowledge
Stop
W = 0
2
2
2
2
2
C interrupt asserts, because the I
C controller sends a
C controller loads the I
C controller shifts the remainder of the address and the Write bit out via the
C slave sends an Acknowledge (by pulling the SDA signal Low) during the next
A
START
Data
P R E L I M I N A R Y
TXI
2
START
C controller sets the ACK bit in the I
MODE
bit of the I
bit of the I
2
C Shift Register with the contents of the I
A
2
field in the I
C Data Register.
condition to the I
2
2
C Data Register is empty.
2
2
C Control Register.
C Control Register to enable transmit inter-
Data
C Control Register.
2
C Mode Register for MASTER/
2
A
C slave.
MODE
Product Specification
Data
2
C Data Register.
2
C Status Register.
field selects the
Master Transactions
A/A
2
C Data Reg-
P/S
171

Related parts for Z8FMC04100