AM29BDS320G SPANSION [SPANSION], AM29BDS320G Datasheet - Page 3

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AM29BDS320G

Manufacturer Part Number
AM29BDS320G
Description
32 Megabit (2 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
Manufacturer
SPANSION [SPANSION]
Datasheet
Am29BDS320G
32 Megabit (2 M x 16-Bit), 1.8 Volt-only
Simultaneous Read/Write, Burst Mode Flash Memory
Data Sheet
Distinctive Characteristics
Architectural Advantages
Performance Charcteristics
Single 1.8 volt read, program and erase (1.65 to
1.95 volt)
Manufactured on 0.17 µm process technology
Enhanced VersatileIO™ (V
— Device generates data output voltages and tolerates
— 1.8V and 3V compatible I/O signals
Simultaneous Read/Write operation
— Data can be continuously read from one bank while
— Zero latency between read and write operations
— Four bank architecture: 8Mb/8Mb/8Mb/8Mb
Programmable Burst Interface
— 2 Modes of Burst Read Operation
— Linear Burst: 8, 16, and 32 words with wrap-around
— Continuous Sequential Burst
Sector Architecture
— Eight 8 Kword sectors and sixty-two 32 Kword
— Banks A and D each contain four 8 Kword sectors and
— Eight 8 Kword boot sectors, four at the top of the
Minimum 1 million erase cycle guarantee per
sector
20-year data retention at 125°C
— Reliable operation for the life of the system
64-ball FBGA package
Read access times at 54/40 MHz (at 30 pF)
— Burst access times of 13.5/20 ns
— Asynchronous random access times of 70 ns
— Initial Synchronous access times as fast as 87.5/95 ns
Power dissipation (typical values, C
— Burst Mode Read: 10 mA
— Simultaneous Operation: 25 mA
— Program/Erase: 15 mA
— Standby mode: 0.2 µA
data input voltages as determined by the voltage on
the V
executing erase/program functions in other bank
sectors
fifteen 32 Kword sectors; Banks B and C each contain
sixteen 32 Kword sectors
address range, and four at the bottom of the address
range
IO
pin
Publication Number 27243
IO
) Feature
L
= 30 pF)
Revision B
Amendment 1
Hardware Features
Software Features
Sector Protection
— Software command sector locking
Reduced Wait-State Handshaking feature available
— Provides host system with minimum possible latency
Hardware reset input (RESET#)
— Hardware method to reset the device for reading
WP# input
— Write protect (WP#) function protects sectors 0 and 1
ACC input: Acceleration function reduces
programming time; all sectors locked when ACC =
V
CMOS compatible inputs, CMOS compatible outputs
Low V
Supports Common Flash Memory Interface (CFI)
Software command set compatible with JEDEC
42.4 standards
— Backwards compatible with Am29F and Am29LV
Data# Polling and toggle bits
— Provides a software method of detecting program
Erase Suspend/Resume
— Suspends an erase operation to read data from, or
Unlock Bypass Program command
— Reduces overall programming time when issuing
IL
by monitoring RDY
array data
(bottom boot), or sectors 68 and 69 (top boot),
regardless of sector protect status
families
and erase operation completion
program data to, a sector that is not being erased,
then resumes the erase operation
multiple program command sequences
CC
Issue Date October 1, 2003
write inhibit
PRELIMINARY

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