AM29BDS320G SPANSION [SPANSION], AM29BDS320G Datasheet - Page 52

• Manufacturer Part Number: AM29BDS320G
• Description: 32 Megabit (2 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
• Manufacturer: SPANSION [SPANSION]

AC Characteristics
Notes:
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed
2. If any burst address occurs at a 64-word boundary, one additional clock cycle is inserted, and is indicated by RDY.
3. The device is in synchronous mode.
4. In the Burst Mode Configuration Register, A17 = 1.
Note: Figure assumes 7 wait states for initial access, 54 MHz clock, and automatic detect synchronous read. D0–D7 in
data waveform indicate the order of data within a given 8-word address range, from lowest to highest. Data will wrap
around within the 8 words non-stop unless the RESET# is asserted low, or AVD# latches in another address. Starting
address in figure is the 7th address in range (A6). See “Requirements for Synchronous (Burst) Read Operation”. The
Set Configuration Register command sequence has been written with A18=1; device will output RDY with valid data.
50
DQ15-DQ0
DQ15-DQ0
from two cycles to seven cycles. Clock is set for active rising edge.
A20-A0
A20-A0
AVD#
AVD#
CE#
OE#
RDY
CLK
OE#
CE#
RDY
CLK
Hi-Z
t
Hi-Z
t
AVDS
ACS
t
AAS
t
ACH
Aa
Aa
t
AVC
t
1
CAS
t
CES
t
AVD
t
AVD
t
AAH
2
Figure 14. 8-word Linear Burst with Wrap Around
1
t
OE
t
OE
Figure 13. Synchronous Burst Mode Read
7
3
2
7 cycles for initial access shown.
cycles for initial access shown.
t
t
IACC
ACC
t
IACC
4
18.5 ns typ. (54 MHz)
3
t
ACC
Am29BDS320G
5
P r e l i m i n a r y
4
6
5
t
RACC
7
t
RDYS
D6
6
t
t
BDH
RACC
D7
7
t
RDYS
t
BACC
Da
D0
t
BDH
Da + 1
D1
t
BACC
27243B1 October 1, 2003
D5
Da + n
t
t
CEZ
OEZ
D6
Hi-Z
Hi-Z