HY27US08561M HYNIX [Hynix Semiconductor], HY27US08561M Datasheet - Page 15

• Manufacturer Part Number: HY27US08561M
• Description: 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
• Manufacturer: HYNIX [Hynix Semiconductor]

A9-A24(1)
A9-A24(1)
Note: 1. If t
Note: 1. Highest address depends on device density.
Rev 0.7 / Oct. 2004
A0-A7
A0-A7
CE
RE
RB
CLE
ALE
WE
I/O
ELWL
Command
(1st half Page)
(1st half Page)
01h/ 50h
Code
00h/
is less than 10ns, t
Read A Command, x8 Devices
Area A
Area A
Read B Command, x8 Devices
Address Input
(2nd half
(2nd half
Area B
Area B
WLWH
Page)
Page)
Figure 10. Read (A, B, C) Operation
must be minimum 35ns, otherwise, t
Figure 11. Read Block Diagrams
(Spare)
(Spare)
Area C
Area C
tBLBH1
(read)
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Busy
A9-A24(1)
A0-A2 (x16)
A9-A24(1)
A0-A3 (x8)
A0-A7
WLWH
Data Output (sequentially)
HY27US(08/16)561M Series
HY27SS(08/16)561M Series
may be minimum 25ns.
Read A Command, x16 Devices
Area A
Read C Command, x8/x16 Devices
A4-A7 (x8), A3-A7 (x16) are don't care
(main area)
Area A
Area A/B
Area C
(Spare)
(50h)
Area C
15