HY27US08561M HYNIX [Hynix Semiconductor], HY27US08561M Datasheet - Page 20

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HY27US08561M

Manufacturer Part Number
HY27US08561M
Description
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet

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HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
P/E/R Controller Bit (SR5)
The Program/Erase/Read Controller bit indicates whether the P/E/R Controller is active or inactive. When the P/E/R
Controller bit is set to '0', the P/E/R Controller is active (device is busy); when the bit is set to '1', the P/E/R Controller
is inactive (device is ready).
Error Bit (SR0)
The Error bit is used to identify if any errors have been detected by the P/E/R Controller. The Error Bit is set to '1' when
a program or erase operation has failed to write the correct data to the memory. If the Error Bit is set to '0' the opera-
tion has completed successfully.
SR4, SR3 and SR2 are Reserved
Rev 0.7 / Oct. 2004
20

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