IA186EM-PQF100I-R INNOVASIC [InnovASIC, Inc], IA186EM-PQF100I-R Datasheet - Page 132

• Manufacturer Part Number: IA186EM-PQF100I-R
• Description: 8/16-Bit Microcontrollers
• Manufacturer: INNOVASIC [InnovASIC, Inc]

IA186EM/IA188EM
8/16-BIT Microcontrollers
Version -03
1) Problem: There is a difference in how priority of timer interrupts are asserted between the original AMD part
2) Problem: Lock up just after reset is released.
3) Problem: Intermittent startup.
and the Innovasic part.
Analysis: In the original AMD part, timer interrupts cannot be interrupted by another timer interrupt, even if the
new timer interrupt is of a higher priority. The Innovasic part will interrupt a timer interrupt with a higher
priority timer interrupt. Additionally, if a lower priority timer interrupt is interrupted with a higher priority timer
interrupt and another occurrence of the lower priority interrupt occurs during the processing of the higher
priority interrupt, upon execution of the EOI a new lower priority interrupt will be initiated, possibly orphaning
the original lower priority timer interrupt.
Workaround: When using nested interrupts, at the beginning of the interrupt routine before the global interrupts
are enabled with a CLI, timer interrupts must be specifically masked. At the end of the timer interrupt routine
being serviced, you need to set the Interrupt Enable Bit in the Process Status Word to globally disable interrupts
prior to clearing the timer interrupt being serviced and unmask the appropriate timer interrupts.
which will pull them high when the reset condition tristates these pins. The Innovasic device does not
include internal pullups on these pins allowing these outputs to float during reset.
Workaround: Add 10K ohm pullups to WR_n and RD_n pins to guarantee proper logic levels at the end of
reset.
Analysis: Usually, the first instruction is a long jump to the start of the user's code. In this case, the
compiler apparently inserted a short jump instruction with zero displacement before the expected long
jump instruction. The OEM device stuttered, but recovered to execute the long jump, while the IA
device instruction pointer was corrupted, causing the lock up. In summary, a short jump with zero
displacement is a corner case that does not work in the IA device.
Workaround: Do not use a short jump instruction with zero displacement.
Analysis: Processor either came out of reset normally, or would go into a series of watchdog
timeouts. The addition of 10K ohm pullups to the WR_n and RD_n outputs seemed to solve the issue.
Further analysis of the OEM device shows the presence of undocumented pullups on these pins,
which will pull them high when the reset condition tristates these pins. The Innovasic device does not
include internal pullups on these pins allowing these outputs to float during reset.
Workaround: Add 10K ohm pullups to WR_n and RD_n pins to guarantee proper logic levels at the end of
reset.
3737 Princeton NE, Ste 130 • Albuquerque, NM 87107 • Tel [phone] • Fax [phone] • www.Innovasic.com
As of Production Version -03
Data Sheet