IA186EM-PQF100I-R INNOVASIC [InnovASIC, Inc], IA186EM-PQF100I-R Datasheet - Page 46

• Manufacturer Part Number: IA186EM-PQF100I-R
• Description: 8/16-Bit Microcontrollers
• Manufacturer: INNOVASIC [InnovASIC, Inc]

IA186EM/IA188EM
8/16-BIT Microcontrollers
The CPU shifts left 2 bits (multiplies by 4) an 8-bit interrupt type, generated by the interrupt controller, to
produce an offset into the interrupt vector table.
The INTVEC register is undefined at reset.
SSR (018h) – Synchronous Serial Receive Register.
This register holds the serial data received on the SSI port.
The value of the SSR register is undefined at reset.
SSD0 (016h) – Synchronous Serial Transmit Registers.
SSD0 (014h)
These registers hold the data to be transmitted by the SSI ports.
The value of these registers is undefined at reset.
SSC (012h) – Synchronous Serial Control Register.
Reserved (bits 15-8) – Read as 0.
T [4:0] (bits 7-3) – Interrupt Type. These five bits contain the five most significant bits of the
interrupt types used for the internal interrupt type. The least significant three bits of the interrupt type
are supplied by the interrupt controller, as set by the priority level of the interrupt request.
Reserved (bits 2-0) – Read as 0.
Reserved (bits 15-8) – Reserved Bits.
SR[7:0] (bits 7-0) – Data received over the SDATA pin.
Reserved (bits 15-8) – Reserved Bits.
SD[7:0] (bits 7-0) – Data to be transmitted over the SDATA pin.
15
15
15
0
3737 Princeton NE, Ste 130 • Albuquerque, NM 87107 • Tel [phone] • Fax [phone] • www.Innovasic.com
14
14
14
0
13
13
13
0
Reserved
Reserved
12
12
12
0
11
11
11
0
10
10
10
0
9
9
9
0
8
8
8
0
7
7
7
As of Production Version -03
6
6
6
T4 – T0
5
5
5
SD7-SD0
SR7-SR0
4
4
4
3
3
3
2
0
2
2
Data Sheet
1
1
1
0
0
0
0
0