IA186EM-PQF100I-R INNOVASIC [InnovASIC, Inc], IA186EM-PQF100I-R Datasheet - Page 22
IA186EM-PQF100I-R
Manufacturer Part Number
IA186EM-PQF100I-R
Description
8/16-Bit Microcontrollers
Manufacturer
INNOVASIC [InnovASIC, Inc]
Datasheet
1.IA186EM-PQF100I-R.pdf
(133 pages)
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IA186EM/IA188EM
8/16-BIT Microcontrollers
The value in this register determines the number of internal processor cycles in one phase (half-period) of
the 32 x serial clock.
The contents of these registers must be adjusted to reflect the new processor clock frequency if power-
save mode is in effect.
The baud rate divisor may be calculated from:
BAUDDIV = (Processor Frequency / (32 x baud rate)) -1
By setting the BAUDDIV to 0000h, the maximum baud rate of 1/32 of the internal processor frequency
clock is set. Setting BAUDDIV to 129 (81h) provides a baud rate of 9600 at 40MHz. The baud rate
tolerance is +4.6% and –1.9% with respect to the actual serial port baud rate, not the target baud rate.
Baud Rates
The value of the SPBAUD register at reset is undefined.
BAUDDIV [15:0] (bits 15-0) – Baud Rate Divisor. Defines the divisor for the internal processor
clock.
15
300
600
1200
2400
4800
9600
14400
19200
625 Kbaud
781.25 Kbaud
1.041 Mbaud
1.25 Mbaud
3737 Princeton NE, Ste 130 • Albuquerque, NM 87107 • Tel 505.883.5263 • Fax 505.883.5477 • www.Innovasic.com
Baud Rate
14
13
20 MHz
2082
1040
519
259
129
n/a
n/a
n/a
64
42
31
0
12
11
Divisor Based on CPU Clock Rate
BAUDDIV
25 MHz
10
2603
1301
650
324
161
n/a
n/a
n/a
80
53
39
0
As of Production Version -03
9
8
33 MHz
3471
1735
433
216
867
107
n/a
n/a
n/a
71
53
7 6 5 4 3
0
40 MHz
4165
2082
1040
519
259
129
n/a
n/a
85
64
2
0
1
Data Sheet
1
0
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