IA186EM-PQF100I-R INNOVASIC [InnovASIC, Inc], IA186EM-PQF100I-R Datasheet - Page 95

• Manufacturer Part Number: IA186EM-PQF100I-R
• Description: 8/16-Bit Microcontrollers
• Manufacturer: INNOVASIC [InnovASIC, Inc]

IA186EM/IA188EM
8/16-BIT Microcontrollers
Numeric Key to Waveform Parameters
No. Name Description
10 tLHLL
11 tCHLL
12 tAVLL
13 tLLAX
14 tAVCH
15 tCLAZ
16 tCLCSV mcs_n/pcs_n Inactive Delay
17 tCXCSX mcs_n/pcs_n Hold from Command Inactive
18 tCHCSX mcs_n/pcs_n Inactive Delay
19 tDXDL
20 tCVCTV Control Active Delay 1
21 tCVDEX den_n Inactive Delay
22 tCHCTV Control Active Delay 2
23 tLHAV
24 tAZRL
25 tCLRL
26 tRLRH
27 tCLRH
28 tRHLH
29 tRHAV
30 tCLDOX Data Hold Time
31 tCVCTX Control Inactive Delay
32 tWLWH wr_n Pulse Width
33 tWHLH
34 tWHDX
35 tWHDEX wr_n Inactive to den_n Inactive
36 tCKIN
37 tCLCK
38 tCHCK
39 tCKHL
40 tCKLH
42 tCLCL
1 tDVCL
2 tCLDX
3 tCHSV
4 tCLSH
5 tCLAV
6 tCLAX
7 tCLDV
8 tCHDX
9 tCHLH
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Data in Setup
Data in Hold
Status Active Delay
Status Inactive Delay
ad Address Valid Delay
Address Hold
Data Valid Delay
Status Hold Time
ale Active Delay
ale Width
ale Inactive Delay
ad Address Valid to ALE Low
ad Address Hold from ALE Inactive
ad Address Valid to Clock High
ad Address Float Delay
den_n Inactive to dt_r_n Low
ale High to Address Valid
ad Address Float to rd_n Active
rd_n Active Delay
rd_n Pulse Width
rd_n Inactive Delay
rd_n Inactive to ale High
rd_n Inactive to ad Address Active
wr_n Inactive to ale High
Data Hold after wr_n
X1 Period
X1 Low Time
X1 High Time
X1 Fall Time
X1 Rise time
clkoutA Period
No. Name Description
43 tCLCH
44 tCHCL
47 tSRYCL srdy Transition Setup Time
48 tCLSRY srdy Transistion Hold Time
49 tARYCH ardy Resolution Transition Setup Time
50 tCLARX ardy Active Hold Time
51 tARYCHL ardy Inactive Holding Time
52 tARYLCL ardy Setup Time
53 tINVCH
54 tINVCL
55 tCLTMV Timer Output Delay
57 tRESIN
58 tHVCL
59 tRHDX
61 tLOCK
62 tCLHAV hlda Valid Delay
63 tCHCZ
65 tAVWL
67 tCHCSV clkoutA High to lcs_n/usc_n Valid
68 tCHAV
70 tCICOB X1 to clkoutB Skew
71 tCLEV
72 tCLSL
75 tDVSH
77 tSHDX
78 tSLDV
79 tCHRFD clkoutA High to rfsh_n Valid
80 tCLCLX lcs_n Inactive Delay
81 tCLCSL lcs_n Active Delay
82 tCLRF
83 tCOAOB clkoutA to clkoutB Skew
84 tLRLL
85 tRFCY
86 tLCRF
87 tAVBL
45 tCH1CH2 clkoutA Rise Time
46 tCL2CL1 clkoutA Fall Time
64 tCHCV
66 tAVRL
69 tCICOA X1 to clkoutA Skew
As of Production Version -03
clkoutA Low Time
clkoutA High Time
Peripheral Setup Time
drq Setup Time
res_n Setup Time
hld Setup Time
rd_n High to Data Hold on ad Bus
Maximum PLL Lock Time
Command Lines Float Delay
Command Lines Valid Delay (after Float)
a Address Valid to wr_n Low
a Address Valid to rd_n Low
clkoutA High to A Address Valid
clkouta Low to sden Valid
clkouta Low to sclk High
Data Valid to sclk High
sclk High to SPI Data Hold
sclk Low to Data Valid
clkoutA High to rfsh_n Invalid
lcs_n Precharge Pulse Width
rfsh_n Cycle Time
lcs_n Inactive to rfsh_n Active Delay
a Address Valid to whb_n/wlb_n Low
Data Sheet