IA186EM-PQF100I-R INNOVASIC [InnovASIC, Inc], IA186EM-PQF100I-R Datasheet - Page 88

• Manufacturer Part Number: IA186EM-PQF100I-R
• Description: 8/16-Bit Microcontrollers
• Manufacturer: INNOVASIC [InnovASIC, Inc]

IA186EM/IA188EM
8/16-BIT Microcontrollers
Segment Override Prefix
The Operand Address byte is configured as follows.
SR
00
01
10
11
Notation
Parameter
Operand
imm8
imm16
m
m8
m16
r/m8
r/m16
Opcode
Parameter
/0 - /7
/r
Segment Register
CS
SS
DS
ES
:
::
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General word register or a word in memory
The Auxiliary Field in the Operand Address byte specifies an extension (from 000 to 111,
The component of the left is the segment for a component located in
memory. The component on the right is the offset.
The component of the left is concatenated with the component on the right.
Translation
Immediate byte: signed number between –128 and 127
Immediate word: signed number between –32768 and 32767
Operand in memory
Byte string in memory pointed to by DS:SI or ES:DI
Word string in memory pointed to by DS:SI or ES:DI
General byte register or a byte in memory
i.e. 0 to 7) to the opcode instead of a register. Thus the opcode for adding (AND) an
immediate byte to a general byte register or a byte in memory is ‘80 /4 ib’. This indicates
that the second byte of the opcode is ‘mod 100 r/m’.
The Auxiliary Field in the Operand Address byte specifies a register rather that an opcode
extension. The opcode byte specifies which register, either byte size or word size, is
assigned as in the aux code above.
Indication
7
0
6
0
5
1
SR
4
SR
As of Production Version -03
3
2
1
1
1
0
0
Data Sheet