82V3352EDG IDT [Integrated Device Technology], 82V3352EDG Datasheet - Page 68
82V3352EDG
Manufacturer Part Number
82V3352EDG
Description
SYNCHRONOUS ETHERNET WAN PLL
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.82V3352EDG.pdf
(125 pages)
- Current page: 68 of 125
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IN3_CMOS_SEL_PRIORITY_CNFG - CMOS Input Clock 3 Priority Configuration *
Programming Information
Address: 2AH
Type: Read / Write
Default Value: XXXX0100
IDT82V3352
7 - 4
3 - 0
Bit
7
-
IN3_CMOS_SEL_PRIORITY[3:0]
6
-
Name
-
5
-
Reserved.
These bits set the priority of the corresponding IN3_CMOS.
0000: Disable INn for automatic selection.
0001: Priority 1.
0010: Priority 2.
0011: Priority 3.
0100: Priority 4. (default)
0101: Priority 5.
0110: Priority 6.
0111: Priority 7.
1000: Priority 8.
1001: Priority 9.
1010: Priority 10.
1011: Priority 11.
1100: Priority 12.
1101: Priority 13.
1110: Priority 14.
1111: Priority 15.
4
-
68
IN3_CMOS_SE
L_PRIORITY3
3
Description
IN3_CMOS_SE
L_PRIORITY2
2
SYNCHRONOUS ETHERNET WAN PLL
IN3_CMOS_SE
L_PRIORITY1
1
IN3_CMOS_SE
L_PRIORITY0
March 23, 2009
0
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