MT90502_06 ZARLINK [Zarlink Semiconductor Inc], MT90502_06 Datasheet

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MT90502_06

Manufacturer Part Number

MT90502_06

Description

Multi-Channel AAL2 SAR

Manufacturer

ZARLINK [Zarlink Semiconductor Inc]

Datasheet

1.MT90502_06.pdf (205 pages)

Current page: 1 of 205
Download datasheet (2Mb)

Features

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4096 x 64 kbps

AAL2 Segmentation Reassembly device

capable of simultaneously processing up to

1023 active CIDs (AAL2 Channel Identifier) and

1023 active VCs (Virtual Circuits)

Support for up to 255 CIDs per VC. Maximum of

1023 CIDs

Implements AAL2 Common Part Sub-layer

(CPS) functions specified in ITU I.363.2

Implements AAL2 Service Specific

Convergence Sub-layer (SSCS) functions for

G.711 PCM and G.726 ADPCM voice

Supports 44-byte PCM or ADPCM packet

profiles specified in AF-VMOA-0145.00

CPS packet payload can support up to 64-bytes

Supports over-subscription of 10:1

H.100/H.110 compatible TDM bus for PCM or

ADPCM data. Supports both master and slave

TDM bus clock operation

TDM Bus

Clock and

Frame

Pulse

MT90502

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

Generation

Module

(max: 1M x18)

Recovery

TDM

Clock

SSRAM

and

Copyright 2001-2005, Zarlink Semiconductor Inc. All Rights Reserved.

Memory Bank A

CPS Packets

Figure 1 - MT90502 Functional Block

(max: 8M x16)

CPS Packets

SDRAM

RX

TX

Zarlink Semiconductor Inc.

Dual Memory Controller

CPU Interface

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TDM bus also supports compressed voice such

as ITU G.723, G.728 and G.729 through HDLC

encapsulation

Three UTOPIA Level 1 ports configurable as

PHY or ATM allowing for connection to an

external AAL5 SAR processor, or for chaining

multiple MT90502 devices. Ports A & B are

configurable as a single 8-bit UTOPIA Level 2

PHY port with 5 ADDR lines

UTOPIA module provides a cell switching

function with a header translation

Performs silence suppression for PCM and

ADPCM

Transmitter

AAL2 SAR

AAL2 SAR

MT90502AG

MT90502AG2

Receiver

(max: 1M x18)

SSRAM

Memory Bank B (Optional)

**Pb Free Tin/Silver/Copper

Ordering Information

Multi-Channel AAL2 SAR

0 to +70°C

456 PBGA

456 PBGA**

JTAG Interface

(max: 8M x16)

UTOPIA

Module

SDRAM

Port

Port

Port

B

C

A

Trays

Trays

Data Sheet

MT90502

RxA Port

TxA Port

TxB Port

RxC Port

TxC Port

RxB Port

May 2006

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