MT90502_06 ZARLINK [Zarlink Semiconductor Inc], MT90502_06 Datasheet - Page 36

• Manufacturer Part Number: MT90502_06
• Description: Multi-Channel AAL2 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

2.2.2.3
In the MT90502 CPS-Packet assembly engine, any given frame can begin a CPS-Packet. Once this frame is
established, packets will always be formed every 8 x #EDU frames. In order to control the trade-off between delay
and bandwidth efficiency, the MT90502 supports phasing of CPS-Packet construction. For any given EDU value the
MT90502 selects a frame as phase 0 and sub-phase 0. Phase specifies the EDU relative to phase 0 and sub-phase
specifies a sample offset within the EDU. For example if a 5 EDU connection opened with a phase of 1 and
sub-phase of 2 then it will begin assembly 10 frames after a connection of phase 0, sub-phase 0.
Internal phase and sub-phase counters exist to co-ordinate the accumulation of sufficient data for a CPS-Packet
with the construction of CPS-Packets. There are multiple independent phase counters, one for each #EDU.
Channels with the same setting of #EDU share the same phase counter. Phase counters count from 0 to 1, 2, 3, 4,
7, 9 and 10. One global sub-phase counter exists which counts from 0 to 7 and increments on every frame. Each
time the sub-phase counter reaches 0, the phase counters increment. A CPS-Packet is created for a channel when
the channel’s phase counter equals the channel’s phase number, and the sub-phase counter equals the channel’s
sub-phase number. Both phase and sub-phase numbers are user programmed in the PCM/ADPCM CPS-Packet
Assembly Structure, shown in Figure 12.
PCM
PCM
PCM
PCM
PCM
PCM
1
0
0
0
0
0
Phase Alignment
Format of ADPCM Samples in high bits
b7
b7
b7
b7
b7
16 kbps
b7
0
24 kbps
ADPCM 40 kbps
b6
b6
b6
32 kbps
b6
b6
b6
0
b5
b5
b5
b5
b5
b5
1
0
b4
b4
b4
b4
b4
b4
1
0
0
PCM
Silence packets end with this sample. (See Section 2.9.2.2.)
b3
b3
b3
b3
b3
b3
1
0
0
0
Figure 11 - PCM/ADPCM TX Data Format B
b2
b2
b2
b2
b2
b2
1
0
0
0
0
(with Auto PCM-ADPCM Switching)
Format B for TX xxPCM Samples
b1
b1
b1
b1
b1
b1
0
0
0
0
0
b0
b0
b0
b0
b0
b0
Zarlink Semiconductor Inc.
0
0
0
0
0
MT90502
36
PCM
PCM
PCM
PCM
PCM
PCM
1
0
0
0
0
0
Format of ADPCM Samples in low bits
b7
b7
b7
b7
b7
b7
0
0
0
0
0
b6
b6
b6
b6
b6
b6
0
0
0
0
0
b5
b5
b5
b5
b5
b5
1
0
0
0
0
b4
b4
b4
b4
b4
b4
1
0
0
0
PCM
ADPCM 40 kbps
b3
b3
b3
b3
b3
b3
1
0
0
b2
b2
b2
32 kbps
b2
b2
b2
1
0
24 kbps
b1
b1
b1
b1
b1
16 kbps
b1
0
Data Sheet
b0
b0
b0
b0
b0
b0
0