AM79C974KCW AMD [Advanced Micro Devices], AM79C974KCW Datasheet - Page 146

• Manufacturer Part Number: AM79C974KCW
• Description: PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
• Manufacturer: AMD [Advanced Micro Devices]

Master Abort
The Am79C974 controller will terminate its cycle with a
Master Abort sequence if DEVSEL is not asserted within
4 clocks after FRAME is asserted. Master Abort is
treated as a fatal error by the Am79C974 controller. For
the Ethernet, the Am79C974 controller will reset all CSR
and BCR locations to their H_RESET values. Any
on-going network activity will be stopped immediately.
12
AMD
DEVSEL
FRAME
TRDY
IRDY
C/BE
REQ
GNT
PAR
CLK
AD
1
DEVSEL is sampled by the Am79C974 controller.
2
3
ADDR
Figure 16. Master Abort
0111
A M E N D M E N T
4
Am79C974
DATA
PAR
5
0000
The PCI configuration registers will not be cleared. For
SCSI, when the master aborts, INTA will not be as-
serted, but the ABORT bit (bit 2 of the DMA status regis-
ter at offset 54h), is set. For either Ethernet or SCSI a
master abort causes RMABORT (bit 13) of the status
register in the appropriate PCI configuration space to
be set.
PAR
6
7
8
9
10
18681A/1-20