AM79C974KCW AMD [Advanced Micro Devices], AM79C974KCW Datasheet - Page 38
![no-image](/images/no-image-200.jpg)
AM79C974KCW
Manufacturer Part Number
AM79C974KCW
Description
PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C974KCW.pdf
(153 pages)
- Current page: 38 of 153
- Download datasheet (833Kb)
Disconnect Without Data Transfer
Figure 12 shows a target disconnect sequence during
which no data is transferred. STOP is asserted on clock
4 without TRDY being asserted at the same time. The
Am79C974 controller terminates the current transfer
with the deassertion of FRAME on clock 5 and one clock
38
AMD
DEVSEL
FRAME
TRDY
STOP
IRDY
C/BE
REQ
GNT
CLK
PAR
AD
1
DEVSEL is sampled by the Am79C974 controller.
ADDRi
0111
2
DATA
Figure 12. Disconnect Without Data Transfer
PAR
3
0000
PAR
4
P R E L I M I N A R Y
Am79C974
5
cycle later with the deassertion of IRDY. It finally re-
leases the bus on clock 6. The Am79C974 controller will
re-request the bus after 2 clock cycles to retry the last
transfer. The starting address of the new transfer will be
the same address as of the last untransferred data.
6
7
8
9
10
ADDRi
0111
11
18681A-16
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