AM79C974KCW AMD [Advanced Micro Devices], AM79C974KCW Datasheet - Page 148
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AM79C974KCW
Manufacturer Part Number
AM79C974KCW
Description
PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C974KCW.pdf
(153 pages)
- Current page: 148 of 153
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have yet to be transferred from the SCSI peripheral de-
vice and must start a new transfer operation to get the
rest of the data. (CTCREG consists of three bytes lo-
cated at ((B)+00h, (B)+04h, and (B)+38h.)
Funneling Logic
Figure 26 shows the internal DMA logic interface with
the SCSI block. The DMA FIFO interfaces to the Funnel
SCSI DMA Programming Sequence
The following section outlines the procedure for execut-
ing SCSI DMA operations:
1. Issue IDLE command to the DMA Engine
2. Configure the SCSI block registers (e.g. synchro-
3. Program the DMA registers to set up address and
4. Issue a transfer command to the SCSI command
14
nous operation, offset values, etc.)
transfer count
registers
AMD
Figure 26. DMA FIFO to SCSI FIFO Interface
A M E N D M E N T
Am79C974
Logic block via a 32-bit data bus, and the funnel logic
properly reduces this stream of data to a 16-bit stream to
properly interface with the SCSI FIFO.
5. Issue the START command to the DMA engine
6. At the end of the DMA transaction, issue the IDLE
MDL Based DMA Programming
The following section outlines the procedure for execut-
ing MDL based DMA operation:
1. Set up the MDL list
2. Use the programming sequence defined earlier for
command to the DMA engine
initiating a SCSI DMA transfer
18681A/1-30
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