ZL50130PBGA ZARLINK [Zarlink Semiconductor Inc], ZL50130PBGA Datasheet - Page 28

• Manufacturer Part Number: ZL50130PBGA
• Description: Ethernet Pseudo-Wires across a PSN
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

M2_RXER
M2_CRS
M2_TXCLK
M2_TXD[3:0]
M2_TXEN
M2_TXER
Signal
Note: This port must not be used to receive data at the same time as port 3,
I/O
I D
I D
I U
O
O
O
Table 5 - MII Port 2 Interface Package Ball Definition
AC24
AC25
AD26
[3]
[2]
AC22
AB20
AE25
AD23
they are mutually exclusive.
Package Balls
Zarlink Semiconductor Inc.
[1]
[0]
ZL50130
MII Port 2
28
AC21
AE24
Receive Error. Active high signal
indicating an error has been
detected. Normally valid when
M2_RXDV is asserted. Can be
used in conjunction with
M2_RXD when M2_RXDV
signal is de-asserted to indicate
a False Carrier.
Carrier Sense. This
asynchronous signal is asserted
when either the transmission or
reception device is non-idle. It is
active high.
MII Transmit Clock
Accepts the following
frequencies:
Transmit Data. Clocked on
rising edge of M2_TXCLK
Transmit Enable. Asserted
when the MAC has data to
transmit, synchronously to
M2_TXCLK with the first
pre-amble of the packet to be
sent. Remains asserted until
the end of the packet
transmission. Active high.
Transmit Error. Transmitted
synchronously with respect to
M2_TXCLK, and active high.
When asserted (with M2_TXEN
also asserted) the ZL50130 will
transmit a non-valid symbol,
somewhere in the transmitted
frame.
25.0 MHz
Description
MII
100 Mbit/s
Data Sheet