ZL50130PBGA ZARLINK [Zarlink Semiconductor Inc], ZL50130PBGA Datasheet - Page 43

• Manufacturer Part Number: ZL50130PBGA
• Description: Ethernet Pseudo-Wires across a PSN
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

9.0
9.1
Data for the MII packet switching is based on Specification IEEE Std. 802.3 - 2000.
9.1.1
TXCLK period
TXCLK high time
TXCLK low time
TXCLK rise time
TXCLK fall time
TXCLK rise to TXD[3:0] active
delay (TXCLK rising edge)
TXCLK to TXEN active delay
(TXCLK rising edge)
TXCLK to TXER active delay
(TXCLK rising edge)
Packet Interface Timing
AC Characteristics
TXD[3:0]
MII Transmit Timing
TXCLK
TXEN
TXER
Parameter
t
t
EV
DV
Table 18 - MII Transmit Timing - 100 Mbit/s
Symbol
t
Figure 7 - MII Transmit Timing Diagram
t
t
CLO
t
t
t
t
t
CHI
CC
CR
CF
DV
EV
ER
Zarlink Semiconductor Inc.
t
ER
Min.
ZL50130
14
14
t
1
1
1
CC
-
-
-
43
100 Mbit/s
Typ.
40
-
-
-
-
-
-
-
t
ER
t
CL
Max.
26
26
25
25
25
5
5
-
t
CH
t
EV
Units
ns
ns
ns
ns
ns
ns
ns
ns
Load = 25 pF
Load = 25 pF
Load = 25 pF
Data Sheet
Notes