ZL50130PBGA ZARLINK [Zarlink Semiconductor Inc], ZL50130PBGA Datasheet - Page 53

• Manufacturer Part Number: ZL50130PBGA
• Description: Ethernet Pseudo-Wires across a PSN
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

10.0
To power up the ZL50130 the following procedure must be used:
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•
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This is illustrated in the diagram shown in Figure 18.
The Core supply must never exceed the I/O supply by more than 0.5 V
Both the Core supply and the I/O supply must be brought up together
The System Reset and, if used, the JTAG Reset must remain low until at least 100 µs after the 100 MHz
system clock has stabilised. Note that if JTAG Reset is not used it must be tied low.
Power Up sequence
SCLK
V
RST
DD
<0.5 V
DC
Figure 18 - Powering Up the ZL50130
Zarlink Semiconductor Inc.
10ns
ZL50130
53
> 100µs
DC
Core supply (1.8 V)
.
I/O supply (3.3 V)
Data Sheet
t
t
t