ZL50130PBGA ZARLINK [Zarlink Semiconductor Inc], ZL50130PBGA Datasheet - Page 45

• Manufacturer Part Number: ZL50130PBGA
• Description: Ethernet Pseudo-Wires across a PSN
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

9.1.3
The management interface is common for all inputs and consists of a serial data I/O line and a clock line.
Note 1:
Note 2:
M_MDC Clock Output period
M_MDC high
M_MDC low
M_MDC rise time
M_MDC fall time
M_MDIO setup time (MDC
rising edge)
M_MDIO hold time (M_MDC
rising edge)
M_MDIO Output Delay
(M_MDC rising edge)
Refer to Clause 22 in IEEE802.3 (2000) Standard for input/output signal timing characteristics
Refer to Clause 22C.4 in IEEE802.3 (2000) Standard for output load description of MDIO
M_MDIO
M_MDIO
Management Interface Timing
M_MDC
M_MDC
Parameter
Figure 10 - Management Interface Timing for Ethernet Port - Write
Figure 9 - Management Interface Timing for Ethernet Port - Read
Table 20 - MAC Management Timing Specification
Symbol
t
t
tMR
t
t
t
MLO
t
t
MHI
MP
MS
MH
MD
MF
t
MD
t
MS
Zarlink Semiconductor Inc.
1990
Min.
t
900
900
MP
10
10
ZL50130
1
-
-
t
MH
45
t
MHI
2000
1000
1000
Typ.
-
-
-
-
-
t
MLO
Max.
2010
1100
1100
300
5
5
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
Data Sheet
Note 1
Note 1
Note 1
Note 2
Notes