ZL50130PBGA ZARLINK [Zarlink Semiconductor Inc], ZL50130PBGA Datasheet - Page 9

• Manufacturer Part Number: ZL50130PBGA
• Description: Ethernet Pseudo-Wires across a PSN
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

2.2.2
The flow in the reverse direction is essentially similar to the PSN-bound flow. Packets from the PSN are received by
its PSN-facing MAC interface. Valid packets are passed to the Packet Classifier to determine the destination. Once
this has been determined, the packets are passed to the Packet Transmit block for forwarding onto the customer.
This time, the Packet Transmit block strips the tunnel header appended on original transmission into the PSN. The
packets are then queued for transmission by the customer-facing MAC.
2.2.3
The control processor can generate packets directly, allowing it to use the network for out-of-band communications.
This can be used for out-of-band transmission of control data or network setup information, e.g., routing
information. The host interface can also be used by a local resource for network transmission of processed data.
The device supports DMA transfers of packets to and from the CPU memory, using the host’s own DMA controller.
2.2.4
The ZL50130 includes a large amount of on-chip memory, such that for most applications, external memory will not
be required. However, for some applications there may be a requirement for external memory. Therefore, the
device allows the external connection of up to 8 Mbytes of synchronous ZBT SRAM.
CE-Bound Flow
Host Packet Generation
External Memory Requirement
Zarlink Semiconductor Inc.
ZL50130
9
Data Sheet