M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 249
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M1AFS250-FGG256I
Manufacturer Part Number
M1AFS250-FGG256I
Description
Actel Fusion Family Of Mixed Signal Fpgas
Manufacturer
Actel Corporation
Datasheet
1.M1AFS250-FGG256.pdf
(330 pages)
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Price
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Part Number:
M1AFS250-FGG256I
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Microsemi SoC
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IEEE 1532 Characteristics
JTAG timing delays do not include JTAG I/Os. To obtain complete JTAG timing, add I/O buffer delays to
the corresponding standard selected; refer to the I/O timing characteristics in the
page 2-134
Timing Characteristics
Table 2-183 • JTAG 1532
Parameter
t
t
t
t
t
t
F
t
t
Note:
DISU
DIHD
TMSSU
TMDHD
TCK2Q
RSTB2Q
TRSTREM
TRSTREC
TCKMAX
For the derating values at specific junction temperature and voltage supply levels, refer to
Table 3-7 on page
for more details.
Commercial Temperature Range Conditions: T
Test Data Input Setup Time
Test Data Input Hold Time
Test Mode Select Setup Time
Test Mode Select Hold Time
Clock to Q (data out)
Reset to Q (data out)
TCK Maximum Frequency
ResetB Removal Time
ResetB Recovery Time
3-9.
Description
R e v i s i o n 1
J
= 70°C, Worst-Case VCC = 1.425 V
Actel Fusion Family of Mixed Signal FPGAs
20.00
25.00
0.50
1.00
0.50
1.00
6.00
0.00
0.20
–2
22.67
22.00
0.57
1.13
0.57
1.13
6.80
0.00
0.23
–1
"User I/Os" section on
26.67
19.00
8.00
0.00
0.27
Std.
0.67
1.33
0.67
1.33
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
2- 233
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