M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 277

• Manufacturer Part Number: M1AFS250-FGG256I
• Description: Actel Fusion Family Of Mixed Signal Fpgas
• Manufacturer: Actel Corporation

RC Oscillator Dynamic Contribution—P
Analog System Dynamic Contribution—P
Guidelines
Toggle Rate Definition
A toggle rate defines the frequency of a net or logic element relative to a clock. It is a percentage. If the
toggle rate of a net is 100%, this means that the net switches at half the clock frequency. Below are some
examples:
Enable Rate Definition
Output enable rate is the average percentage of time during which tristate outputs are enabled. When
non-tristate output buffers are used, the enable rate should be 100%.
Table 3-16 • Toggle Rate Guidelines Recommended for Power Calculation
Table 3-17 • Enable Rate Guidelines Recommended for Power Calculation
Component
α
α
Component
β
β
β
β
1
2
3
4
1
2
Operating Mode
P
Standby Mode and Sleep Mode
P
Operating Mode
P
Standby Mode and Sleep Mode
P
•
•
AB
AB
RC-OSC
RC-OSC
The average toggle rate of a shift register is 100%, as all flip-flop outputs toggle at half of the clock
frequency.
The average toggle rate of an 8-bit counter is 25%:
– Bit 0 (LSB) = 100%
– Bit 1 = 50%
– Bit 2 = 25%
– …
– Bit 7 (MSB) = 0.78125%
– Average toggle rate = (100% + 50% + 25% + 12.5% + . . . 0.78125%) / 8.
= P
= 0 W
AC20
= P
= 0 W
AC19
Toggle rate of VersaTile outputs
I/O buffer toggle rate
I/O output buffer enable rate
RAM enable rate for read operations
RAM enable rate for write operations
NVM enable rate for read operations
R e v i s i o n 1
Definition
Definition
RC-OSC
AB
Actel Fusion Family of Mixed Signal FPGAs
Guideline
Guideline
12.5%
12.5%
100%
10%
10%
0%
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