S9S12P96J0VFTR Freescale Semiconductor, S9S12P96J0VFTR Datasheet - Page 208

• Manufacturer Part Number: S9S12P96J0VFTR
• Description: 16-bit Microcontrollers - MCU 16 BIT 96K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P96J0VFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 96 KB
• Data Ram Size: 6 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C

S12 Clock, Reset and Power Management Unit (S12CPMU)
7.3.2.3
The POSTDIV register controls the frequency ratio between the VCOCLK and the PLLCLK.
Read: Anytime
Write: If PLLSEL=1 write anytime, else write has no effect.
7.3.2.4
This register provides S12CPMU status bits and flags.
Read: Anytime
208
1. PORF is set to 1 when a power on reset occurs. Unaffected by System Reset.
2. LVRF is set to 1 when a low voltage reset occurs. Unaffected by System Reset. Set by power on reset.
3. ILAF is set to 1 when an illegal address reset occurs. Unaffected by System Reset. Cleared by power on reset.
0x0036
0x0037
Reset
Reset
If PLL is selected (PLLSEL=1)
If PLL is locked (LOCK=1)
If PLL is not locked (LOCK=0)
W
W
R
R
RTIF
S12CPMU Post Divider Register (CPMUPOSTDIV)
S12CPMU Flags Register (CPMUFLG)
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 7-6. S12CPMU Post Divider Register (CPMUPOSTDIV)
Note 1
PORF
0
0
6
6
Figure 7-7. S12CPMU Flags Register (CPMUFLG)
f PLL
f PLL
f bus
S12P-Family Reference Manual, Rev. 1.13
Note 2
LVRF
0
0
5
5
=
=
=
f PLL
------------ -
---------------------------------------- -
(
f VCO
---------------
POSTDIV
2
4
f VCO
LOCKIF
0
0
4
4
+
1
)
LOCK
0
0
3
3
POSTDIV[4:0]
Note 3
ILAF
0
2
2
Freescale Semiconductor
OSCIF
1
0
1
1
UPOSC
1
0
0
0