S9S12P96J0VFTR Freescale Semiconductor, S9S12P96J0VFTR Datasheet - Page 282

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S9S12P96J0VFTR

Manufacturer Part Number
S9S12P96J0VFTR
Description
16-bit Microcontrollers - MCU 16 BIT 96K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P96J0VFTR

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
96 KB
Data Ram Size
6 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Freescale’s Scalable Controller Area Network (S12MSCANV3)
8.3.3.2
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
Module Base + 0x00X4 to Module Base + 0x00XB
282
Module Base + 0x00X2
Module Base + 0x00X3
DB[7:0]
Field
7-0
Reset:
Reset:
Reset:
W
W
R
R
Figure 8-34. Data Segment Registers (DSR0–DSR7) — Extended Identifier Mapping
W
R
Data bits 7-0
Data Segment Registers (DSR0-7)
x
x
7
7
DB7
x
7
= Unused; always read ‘x’
= Unused; always read ‘x’
Figure 8-32. Identifier Register 2 — Standard Mapping
Figure 8-33. Identifier Register 3 — Standard Mapping
Table 8-33. DSR0–DSR7 Register Field Descriptions
6
x
6
x
DB6
x
6
S12P-Family Reference Manual, Rev. 1.13
5
x
5
x
DB5
x
5
4
x
4
x
DB4
Description
x
4
3
x
3
x
DB3
3
x
DB2
x
x
2
2
2
x
Freescale Semiconductor
DB1
x
x
1
1
1
x
DB0
x
x
0
0
0
x

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