LPC1114FHN33/302 NXP Semiconductors, LPC1114FHN33/302 Datasheet - Page 113
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LPC1114FHN33/302
Manufacturer Part Number
LPC1114FHN33/302
Description
ARM Microcontrollers - MCU 32b 32K Flash 42I/O
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1114FN2810212.pdf
(114 pages)
Specifications of LPC1114FHN33/302
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, SSP, UART
Maximum Operating Temperature
+ 85 C
Number Of Programmable I/os
42
Number Of Timers
4
Program Memory Type
Flash
Factory Pack Quantity
260
Tradename
LPC1100L
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1114FHN33/302
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
LPC1114FHN33/302:5
Manufacturer:
Intersil
Quantity:
419
Part Number:
LPC1114FHN33/302:5
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
18. Contents
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.5.1
7.5.2
7.6
7.7
7.7.1
7.8
7.8.1
7.9
7.9.1
7.10
7.10.1
7.11
7.11.1
7.12
7.12.1
7.13
7.14
7.14.1
7.15
7.15.1
7.16
7.16.1
7.16.1.1
7.16.1.2
7.16.1.3
7.16.2
7.16.3
7.16.4
LPC111X
Product data sheet
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pinning information . . . . . . . . . . . . . . . . . . . . . . 9
Functional description . . . . . . . . . . . . . . . . . . 42
On-chip flash program memory . . . . . . . . . . . 42
Nested Vectored Interrupt Controller
Fast general purpose parallel I/O . . . . . . . . . . 45
I
General purpose external event
Watchdog timer (LPC1100 series,
Windowed WatchDog Timer
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 16
ARM Cortex-M0 processor . . . . . . . . . . . . . . . 42
On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 42
Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . 42
(NVIC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Interrupt sources. . . . . . . . . . . . . . . . . . . . . . . 45
IOCONFIG block . . . . . . . . . . . . . . . . . . . . . . 45
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
SPI serial I/O controller. . . . . . . . . . . . . . . . . . 46
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10-bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
counter/timers . . . . . . . . . . . . . . . . . . . . . . . . . 48
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
System tick timer . . . . . . . . . . . . . . . . . . . . . . 48
LPC111x/101/201/301) . . . . . . . . . . . . . . . . . . 48
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
(LPC1100L and LPC1100XL series). . . . . . . . 49
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Clocking and power control . . . . . . . . . . . . . . 49
Crystal oscillators . . . . . . . . . . . . . . . . . . . . . . 49
Internal RC oscillator . . . . . . . . . . . . . . . . . . . 50
System oscillator . . . . . . . . . . . . . . . . . . . . . . 50
Watchdog oscillator . . . . . . . . . . . . . . . . . . . . 51
System PLL . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Clock output . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Wake-up process . . . . . . . . . . . . . . . . . . . . . . 51
2
C-bus serial I/O controller . . . . . . . . . . . . . . 47
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 20 February 2013
7.16.5
7.16.5.1
7.16.5.2
7.16.5.3
7.16.5.4
7.17
7.17.1
7.17.2
7.17.3
7.17.4
7.17.5
7.17.6
7.17.7
7.18
8
9
9.1
9.2
9.3
9.4
9.5
9.6
9.7
10
10.1
10.2
10.3
10.4
10.5
10.6
10.7
11
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
LPC1110/11/12/13/14/15
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 55
Static characteristics . . . . . . . . . . . . . . . . . . . 56
Dynamic characteristics. . . . . . . . . . . . . . . . . 79
Application information . . . . . . . . . . . . . . . . . 87
Power control . . . . . . . . . . . . . . . . . . . . . . . . . 51
Power profiles
(LPC1100L and LPC1100XL series only). . . . 51
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Deep-sleep mode. . . . . . . . . . . . . . . . . . . . . . 52
Deep power-down mode . . . . . . . . . . . . . . . . 52
System control . . . . . . . . . . . . . . . . . . . . . . . . 52
Start logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Brownout detection . . . . . . . . . . . . . . . . . . . . 53
Code security
(Code Read Protection - CRP) . . . . . . . . . . . 53
APB interface . . . . . . . . . . . . . . . . . . . . . . . . . 54
AHBLite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
External interrupt inputs . . . . . . . . . . . . . . . . . 54
Emulation and debugging . . . . . . . . . . . . . . . 54
BOD static characteristics . . . . . . . . . . . . . . . 63
Power consumption LPC1100 series
(LPC111x/101/201/301) . . . . . . . . . . . . . . . . . 64
Power consumption LPC1100L series
(LPC111x/002/102/202/302) . . . . . . . . . . . . . 67
Power consumption LPC1100XL series
(LPC111x/103/203/303/323/333) . . . . . . . . . . 70
CoreMark data . . . . . . . . . . . . . . . . . . . . . . . . 74
Peripheral power consumption . . . . . . . . . . . 75
Electrical pin characteristics. . . . . . . . . . . . . . 76
Power-up ramp conditions . . . . . . . . . . . . . . . 79
Flash memory . . . . . . . . . . . . . . . . . . . . . . . . 79
External clock. . . . . . . . . . . . . . . . . . . . . . . . . 80
Internal oscillators . . . . . . . . . . . . . . . . . . . . . 81
I/O pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
I
SPI interfaces. . . . . . . . . . . . . . . . . . . . . . . . . 84
ADC usage notes. . . . . . . . . . . . . . . . . . . . . . 87
Use of ADC input trigger signals . . . . . . . . . . 87
XTAL input . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
XTAL Printed Circuit Board (PCB) layout
guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Standard I/O pad configuration . . . . . . . . . . . 89
Reset pad configuration . . . . . . . . . . . . . . . . . 90
ElectroMagnetic Compatibility
(EMC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
ADC effective input impedance . . . . . . . . . . . 92
2
C-bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
32-bit ARM Cortex-M0 microcontroller
© NXP B.V. 2013. All rights reserved.
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