ATAES132-SH-ER Atmel, ATAES132-SH-ER Datasheet - Page 125

• Manufacturer Part Number: ATAES132-SH-ER
• Description: EEPROM AES 32Kbit EE I2C
• Manufacturer: Atmel

Specifications of ATAES132-SH-ER

• Rohs: yes
• Maximum Clock Frequency: 1 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Interface Type: I2C
• Factory Pack Quantity: 2300

J.3.
J.3.2.
J.3.3.
I
The ATAES132 utilizes the Atmel AT24C32C Serial EEPROM instruction set. The ATAES132 I
Table J-1.
Table J-35. I
If the ATAES132 receives an invalid or undefined instruction code it will be ignored and the associated data bytes will be
discarded. When any error occurs, the EERR bit of the STATUS register is set to 1b to indicate an error. The host can read the
error code from the response memory buffer at address 0xFE00 using the READ command.
Byte Write (BWRITE)
A byte write operation requires two 8-bit data word addresses following the I
START condition and device address, the ATAES132 will respond with I
(ACKing each byte). The ATAES132 will ACK the receipt of the data byte from the Host. The host microcontroller must
terminate the write sequence with a STOP condition to initiate the write operation.
At this time, the EEPROM enters an internally-timed write cycle to the nonvolatile memory. All inputs are disabled during this
write cycle and the EEPROM will NAK the device address until the write is complete.
If the Host transmits an invalid address, the EEPROM will NAK the second address byte and any data bytes.
When any error occurs, the RRDY and EERR bits of the STATUS register are set to 1b to indicate an error. The Host can
read the error code from the response memory buffer (address 0xFE00) using the RREAD command. If the command is
processed without error, the EERR bit is set to 0b. Reading the response memory buffer does not reset the error code or the
STATUS register .
Figure J-2.
SDA LINE
Page Write (PWRITE)
The ATAES132 is capable of 32-byte page writes. A page write is initiated the same way as a byte write, but the host
microcontroller does not send a STOP condition after the first data byte is clocked in. Instead, after the device ACKs receipt of
the first data byte, the host microcontroller can transmit up to 31 more data bytes (each byte will be ACKed by the ATAES132).
The EEPROM will respond with an I
sequence with a STOP condition. The data address is internally incremented following the receipt of each data byte.
2
Instruction Name
BWRITE
PWRITE
READ
RREAD
SREAD
SRESET
C Instruction Set
S
R
T
A
T
Byte write
M
S
B
2
C Instruction Set for the Atmel ATAES132
ADDRESS
DEVICE
Operation
Byte write. Writes one byte to memory
Page write. Writes 2 to 32 bytes to memory
Read. Reads data from memory starting at the current address
Random read. Reads data from memory starting at the specified address
Sequential read. Reads additional data from memory
Software reset. Resets the internal memory address counter to 0000h
S
B
L
W
W
R
R
T
E
I
/
A
C
K
WORDADDRESS
2
C ACK after each data byte is received. The Host must terminate the page write
FIRST
M
S
B
C
A
K
WORDADDRESS
SECOND
S
B
L
A
C
K
2
Atmel ATAES132 Preliminary Datasheet
C ACK and then clock in the two address bytes
2
C device address byte. Upon receipt of the
DATA
A
C
K
O
S
T
P
2
C Instruction Set is shown in
8760A−CRYPTO−5/11
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