ATAES132-SH-ER Atmel, ATAES132-SH-ER Datasheet - Page 143

• Manufacturer Part Number: ATAES132-SH-ER
• Description: EEPROM AES 32Kbit EE I2C
• Manufacturer: Atmel

Specifications of ATAES132-SH-ER

• Rohs: yes
• Maximum Clock Frequency: 1 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Interface Type: I2C
• Factory Pack Quantity: 2300

L.3.5.
ChipState = Active
The following events cause the ChipState register to be set to the active state (0x0000). The events in this table may result in
a change in the security state of the device.
Table L-45. Description of events causing the ChipState register to be set to 0x0000
Event
Auth Command
AuthCheck Command
AuthCompute Command
BlockRead Command
Counter Command
Crunch Command
DecRead Command
Decrypt Command
EncRead Command
Encrypt Command
EncWrite Command
KeyCompute Command
KeyExport Command
KeyImport Command
KeyLoad Command
KeyTransfer Command
Legacy Command
Lock Command
Nonce Command
NonceCompute
Command
Random Command
Sleep Command
TempSense Command
WriteCompute Command
I
SPI Write
2
C Write
Event description
Device receives a valid Auth command block (Section 7.1)
Device receives a valid AuthCheck command block (Section 7.2)
Device receives a valid AuthCompute command block (Section 7.3)
Device receives a valid BlockRead command block (Section 7.4)
Device receives a valid Counter command block (Section 7.5)
Device receives a valid Crunch command block (Section 7.6)
Device receives a valid DecRead command block (Section 7.7)
Device receives a valid Decrypt command block (Section 7.8)
Device receives a valid EncRead command block (Section 7.9)
Device receives a valid Encrypt command block (Section 7.10)
Device receives a valid EncWrite command block (Section 7.11)
Device receives a valid KeyCompute command block (Section 7.13)
Device receives a valid KeyExport command block (Section 7.14)
Device receives a valid KeyImport command block (Section 7.15)
Device receives a valid KeyLoad command block (Section 7.16)
Device receives a valid KeyTransfer command block (Section 7.17)
Device receives a valid Legacy command block (Section 7.18)
Device receives a valid Lock command block (Section 7.19)
Device receives a valid Nonce command block (Section 7.20)
Device receives a valid NonceCompute command block (Section 7.21)
Device receives a valid Random command block (Section 7.22)
Device receives a valid Sleep command block (Section 7.24)
Device receives a valid TempSense command block (Section 7.25)
Device receives a valid WriteCompute command block (Section 7.26)
I
any key memory address [BWRITE, PWRITE instructions] (Section J.3)
SPI standard write beginning at any user zone address, any configuration memory address, or
any key memory address [WREN, WRITE, WRDI instructions] (Section K.3)
2
C standard write beginning at any user zone address, any configuration memory address, or
Atmel ATAES132 Preliminary Datasheet
8760A−CRYPTO−5/11
143