ATAES132-SH-ER Atmel, ATAES132-SH-ER Datasheet - Page 38
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ATAES132-SH-ER
Manufacturer Part Number
ATAES132-SH-ER
Description
EEPROM AES 32Kbit EE I2C
Manufacturer
Atmel
Datasheet
1.ATAES132-SH-EQ.pdf
(166 pages)
Specifications of ATAES132-SH-ER
Rohs
yes
Maximum Clock Frequency
1 MHz
Operating Supply Voltage
6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
Interface Type
I2C
Factory Pack Quantity
2300
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Table 7-34. Input parameters
Table 7-35. Output parameters
The command and response packet is transmitted as a block beginning with the count and ending with a packet checksum.
This block format is described in Section 6.1.
Opcode
Mode
Param1
Param2
Data1
Data2
Name
ReturnCode
OutData
Name
Decrypt
Mode
DKeyID
Count
InMac
InData
(Bytes)
1 - 32
Size
1
Notes
Upon success, 0x00 will be returned. Any command execution or validation failure generates a
non-zero error code, per Section 6.3.
Decrypted (plaintext) output data
16 or 32
(Bytes)
Size
16
1
1
2
2
Notes
0x07
Bits 0 to 4: Reserved. Must be 0b.
Bit 5: If 1b, include the usage counter associated with the encryption key in
Bit 6: If 1b, include the SerialNum in the MAC
Bit 7: If 1b, include the first 4 bytes of the SmallZone in the MAC
Normal decryption mode: The upper byte is always 0x00, and the lower byte
is the KeyID of the decrypt key
Client decryption mode: The upper byte is the EKeyID, and the lower byte is
the KeyID of the decrypt key
Normal decryption mode: The Upper byte is always 0x00. Lower byte is the
number of bytes to be returned after decryption.
Client decryption mode: The upper byte is the EMacCount. The lower byte is
the number of bytes to be returned after decryption. (see Section 7.8.1)
Integrity MAC for the input data
Input data (ciphertext) to be decrypted
the MAC
Atmel ATAES132 Preliminary Datasheet
8760A−CRYPTO−5/11
38
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