ATAES132-SH-ER Atmel, ATAES132-SH-ER Datasheet - Page 148

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ATAES132-SH-ER

Manufacturer Part Number
ATAES132-SH-ER
Description
EEPROM AES 32Kbit EE I2C
Manufacturer
Atmel
Datasheet

Specifications of ATAES132-SH-ER

Rohs
yes
Maximum Clock Frequency
1 MHz
Operating Supply Voltage
6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
Interface Type
I2C
Factory Pack Quantity
2300
Notes:
All values are preliminary and will be updated after characterization.
Command description
KeyLoad (Mode [5:7] = 000b)
KeyLoad (Mode [5:7] not 000b)
KeyLoad (Mode [5:7] not 000b), with Key Usage
KeyTransfer
Legacy
Legacy, with Key Usage
Lock, without MAC (Mode [5:7] = 000b)
Lock, without MAC (Mode [5:7] not 000b)
Lock, without MAC (Mode [5:7] not 000b), with Key Usage
Lock, with MAC (Mode [5:7] = 000b)
Lock, with MAC (Mode [5:7] not 000b)
Lock, with MAC (Mode [5:7] not 000b), with Key Usage
Nonce, Inbound
Nonce, Random, without RNG Seed Update
Nonce, Random, with RNG Seed Update
NonceCompute
Random, without RNG Seed Update
Random, without RNG Seed Update
Reset
Sleep, enter Standby State
Sleep, enter Sleep State
TempSense
WriteCompute, 1 to 16 Bytes (Mode [5:7] not 000b)
WriteCompute, 1 to 16 Bytes (Mode [5:7] not 000b)
WriteCompute, 1 to 16 Bytes (Mode [5:7] not 000b), with Key Usage
WriteCompute, 17 to 32 Bytes (Mode [5:7] = 000b)
WriteCompute, 17 to 32 Bytes (Mode [5:7] not 000b)
WriteCompute, 17 to 32 Bytes (Mode [5:7] not 000b), with Key Usage
(4)
1.
2. The typical response time is the time required for 60% of devices to place a packet in the response memory
3. The maximum response time is the time required for 95% of devices to place a packet in the response memory
2. The reset command and the sleep command do not generate a response. The response times are the time
3. These times are with the key usage limits enabled in the KeyConfig register. All other times are with the key
The values in this table are based on characterization and/or simulation. These parameters are not tested.
buffer and change the WIP STATUS bit to 0b after successful execution of the command at room temperature. If
an error occurs, the response will be available in a shorter amount of time.
buffer and change the WIP STATUS bit to 0b after successful execution of the command at the worst case
temperature.
Note:
required for the operation to be completed.
usage limits disabled in the KeyConfig register.
(5)
(4)
5 % of the devices may be slower than this number. The Host is expected to read the STATUS
register to determine when a response is available (see Appendix G).
(4)
(5)
(5)
(5)
(5)
(5)
Atmel ATAES132 Preliminary Datasheet
Typical time
0.5 milliseconds
7.5 milliseconds
0.5 milliseconds
7.0 milliseconds
80 milliseconds
(2)
8760A−CRYPTO−5/11
Maximum time
11 milliseconds
11 milliseconds
145 milliseconds
(3)
148

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