ADP5585CP-EVALZ Analog Devices, ADP5585CP-EVALZ Datasheet - Page 32

• Manufacturer Part Number: ADP5585CP-EVALZ
• Description: Interface Development Tools LFCSP Evaluation Board
• Manufacturer: Analog Devices
• Series: ADP5585r

Specifications of ADP5585CP-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: ADP5585
• Interface Type: I2C
• Operating Supply Voltage: 1.8 V to 3 V
• Factory Pack Quantity: 1

ADP5585
Bit(s)
4 to 2
1 to 0
PWM_OFFT_LOW Register 0x2F
Table 55. Register 0x2F, PWM_OFFT_LOW Bit Descriptions
Bit(s)
7 to 0
PWM_OFFT_HIGH Register 0x30
Table 56. PWM_OFFT_HIGH Bit Descriptions
Bit(s)
7 to 0
PWM_ONT_LOW Register 0x31
Table 57. PWM_ONT_LOW Bit Descriptions
Bit(s)
7 to 0
PWM_ONT_HIGH Register 0x32
Table 58. PWM_ONT_HIGH Bit Descriptions
Bit(s)
7 to 0
PWM_CFG Register 0x33
Table 59. PWM_CFG Bit Descriptions
Bit(s)
7 to 3
2
1
0
Bit Name
RESET_TRIG_TIME[2:0]
RESET_PULSE_WIDTH[1:0]
Bit Name
PWM_OFFT_LOW_BYTE[7:0]
Bit Name
PWM_OFFT_HIGH_BYTE[7:0]
Bit Name
PWM_ONT_LOW_BYTE[7:0]
Bit Name
PWM_ONT_HIGH_BYTE[7:0]
Bit Name
N/A
PWM_IN_AND
PWM_MODE
PWM_EN
Access
Read/write
Read/write
Access
Read/write
Access
Read/write
Read/write
Description
Defines the length of time that the reset events must be active before a reset
signal is generated. All events must be active at the same time for the same
duration. RESET_TRIG_TIME[2:0] is common to both RESET1 and RESET2.
000 = immediate.
001 = 1.0 sec.
010 = 1.5 sec.
011 = 2.0 sec.
100 = 2.5 sec.
101 = 3.0 sec.
110 = 3.5 sec.
111 = 4.0 sec.
Defines the pulse width of the reset signals. RESET_PULSE_WIDTH[1:0] is common
to both RESET1 and RESET2.
00 = 500 µs.
01 = 1 ms.
10 = 2 ms.
11 = 10 ms.
Description
Upper eight bits of PWM on time. Note that updated PWM times are not latched
until this byte is written to. PWM count times are referenced from the internal
oscillator. The fastest oscillator setting is 500 kHz (2 µs increments). Therefore, the
maximum period is
This gives PWM frequencies from 500 kHz down to 7.6 Hz.
Description
Reserved.
0 = no external AND’ing.
1 = PWM signal AND’ed with an externally supplied PWM signal (C3).
Defines PWM mode.
0 = continuous.
1 = executes one PWM period, then sets PWM_EN to 0.
Enable PWM generator.
2 µs × 2
Rev. C | Page 32 of 40
Access
Read/write
Access
Read/write
Access
Read/write
16
= 131 ms
Description
Lower eight bits of PWM off time.
Description
Upper eight bits of PWM off time.
Description
Lower eight bits of PWM on time.
Data Sheet