MT48LC64M8A2P-75:C Micron Technology Inc, MT48LC64M8A2P-75:C Datasheet - Page 6
![IC SDRAM 512MBIT 133MHZ 54TSOP](/photos/7/22/72261/557-54-tsop_sml.jpg)
MT48LC64M8A2P-75:C
Manufacturer Part Number
MT48LC64M8A2P-75:C
Description
IC SDRAM 512MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC64M8A2TG-75C_TR.pdf
(68 pages)
Specifications of MT48LC64M8A2P-75:C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
512M (64M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Organization
64Mx8
Density
512Mb
Address Bus
15b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
115mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT48LC64M8A2P-75:C
Manufacturer:
MITSUBISHI
Quantity:
450
Figure 1:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
BA0, BA1
A0–A12,
RAS#
CAS#
WE#
CKE
CLK
CS#
15
128 Meg x 4 SDRAM Functional Block Diagram
REGISTER
ADDRESS
MODE REGISTER
CONTROL
LOGIC
12
COUNTER
REFRESH
13
12
2
13
ADDRESS
2
ROW-
MUX
COUNTER/
CONTROL
COLUMN-
ADDRESS
LATCH
LOGIC
BANK
13
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
12
6
8192
READ DATA LATCH
DQM MASK LOGIC
SENSE AMPLIFIERS
(8,192 x 4,096 x 4)
WRITE DRIVERS
I/O GATING
DECODER
COLUMN
MEMORY
BANK0
ARRAY
Micron Technology, Inc., reserves the right to change products or specifications without notice.
4096
16384
(x4)
BANK1
BANK2
BANK3
512Mb: x4, x8, x16 SDRAM
4
4
1
REGISTER
REGISTER
OUTPUT
General Description
©2000 Micron Technology, Inc. All rights reserved.
DATA
INPUT
DATA
1
4
DQM
DQ0–
DQ3