AT45DB161D-SU Atmel, AT45DB161D-SU Datasheet - Page 11

IC FLASH 16MBIT 66MHZ 8SOIC

AT45DB161D-SU

Manufacturer Part Number
AT45DB161D-SU
Description
IC FLASH 16MBIT 66MHZ 8SOIC
Manufacturer
Atmel

Specifications of AT45DB161D-SU

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
16M (4096 pages x 528 bytes)
Speed
66MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Architecture
Sectored
Interface Type
SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
128 KB x 16
Current, Input, Leakage
1 μA
Current, Operating
11 mA (Read), 12 mA (Program/Erase)
Current, Output, Leakage
1
Data Retention
20 yrs.
Density
16M
Package Type
EIAJ SOIC
Temperature, Operating
-40 to +85 °C
Time, Access
6 ns
Time, Address Hold
5
Time, Address Setup
5
Time, Fall
6.8 ns
Time, Rise
6.8 ns
Voltage, Input, High
1.89 to 2.52 V
Voltage, Input, Low
0.81 to 1.08 V
Voltage, Output, High
2.5 V
Voltage, Output, Low
0.4 V
Voltage, Supply
2.7 to 3.6 V
Memory Configuration
4096 Pages X 528 Bytes
Clock Frequency
66MHz
Supply Voltage Range
2.5V To 3.6V, 2.7V To 3.6V
Rohs Compliant
Yes
Access Time (max)
6ns
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Supply Current
15mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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3500N–DFLASH–05/10
7.8
8.
8.1
8.1.1
Main Memory Page Program Through Buffer
This operation is a combination of the Buffer Write and Buffer to Main Memory Page Program with Built-in Erase
operations. Data is first clocked into buffer 1 or buffer 2 from the input pin (SI) and then programmed into a
specified page in the main memory. To perform a main memory page program through buffer for the standard
Atmel
clocked into the device, followed by three address bytes. The address bytes are comprised of two don’t care bits,
12 page address bits, (PA11 - PA0) that select the page in the main memory where data is to be written, and 10
buffer address bits (BFA9 - BFA0) that select the first byte in the buffer to be written. To perform a main memory
page program through buffer for the binary page size (512-bytes), the opcode 82H for buffer 1 or 85H for buffer 2,
must be clocked into the device followed by three address bytes consisting of three don’t care bits, 12 page
address bits (A20 - A9) that specify the page in the main memory to be written, and 9 buffer address bits (BFA8 -
BFA0) that selects the first byte in the buffer to be written. After all address bytes are clocked in, the part will take
data from the input pins and store it in the specified data buffer. If the end of the buffer is reached, the device will
wrap around back to the beginning of the buffer. When there is a low-to-high transition on the CS pin, the part will
first erase the selected page in main memory to all 1s and then program the data stored in the buffer into that
memory page. Both the erase and the programming of the page are internally self-timed and should take place in a
maximum time of t
Sector Protection
Two protection methods, hardware and software controlled, are provided for protection against inadvertent or
erroneous program and erase cycles. The software controlled method relies on the use of software commands to
enable and disable sector protection while the hardware controlled method employs the use of the Write Protect
(WP) pin. The selection of which sectors that are to be protected or unprotected against program and erase
operations is specified in the nonvolatile Sector Protection Register. The status of whether or not sector protection
has been enabled or disabled by either the software or the hardware controlled methods can be determined by
checking the Status Register.
Software Sector Protection
Enable Sector Protection Command
Sectors specified for protection in the Sector Protection Register can be protected from program and erase
operations by issuing the Enable Sector Protection command. To enable the sector protection using the software
controlled method, the CS pin must first be asserted as it would be with any other command. Once the CS pin has
been asserted, the appropriate 4-byte command sequence must be clocked in via the input pin (SI). After the last
bit of the command sequence has been clocked in, the CS pin must be deasserted after which the sector
protection will be enabled.
Table 8-1.
Figure 8-1.
Command
Enable Sector Protection
CS
SI
®
DataFlash page size (528-bytes), a 1-byte opcode, 82H for buffer 1 or 85H for buffer 2, must first be
Each transition
represents eight bits
Enable Sector Protection Command
Enable Sector Protection
Opcode
Byte 1
EP
. During this time, the status register and the RDY/BUSY pin will indicate that the part is busy.
Opcode
Byte 2
Opcode
Byte 3
Byte 1
3DH
Opcode
Byte 4
Byte 2
2AH
Byte 3
7FH
Atmel AT45DB161D
Byte 4
A9H
11

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