AT45DB161D-SU Atmel, AT45DB161D-SU Datasheet - Page 22

IC FLASH 16MBIT 66MHZ 8SOIC

AT45DB161D-SU

Manufacturer Part Number
AT45DB161D-SU
Description
IC FLASH 16MBIT 66MHZ 8SOIC
Manufacturer
Atmel

Specifications of AT45DB161D-SU

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
16M (4096 pages x 528 bytes)
Speed
66MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Architecture
Sectored
Interface Type
SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
128 KB x 16
Current, Input, Leakage
1 μA
Current, Operating
11 mA (Read), 12 mA (Program/Erase)
Current, Output, Leakage
1
Data Retention
20 yrs.
Density
16M
Package Type
EIAJ SOIC
Temperature, Operating
-40 to +85 °C
Time, Access
6 ns
Time, Address Hold
5
Time, Address Setup
5
Time, Fall
6.8 ns
Time, Rise
6.8 ns
Voltage, Input, High
1.89 to 2.52 V
Voltage, Input, Low
0.81 to 1.08 V
Voltage, Output, High
2.5 V
Voltage, Output, Low
0.4 V
Voltage, Supply
2.7 to 3.6 V
Memory Configuration
4096 Pages X 528 Bytes
Clock Frequency
66MHz
Supply Voltage Range
2.5V To 3.6V, 2.7V To 3.6V
Rohs Compliant
Yes
Access Time (max)
6ns
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Supply Current
15mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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13.
13.1
22
Figure 12-2. Resume from Deep Power-Down
“Power of 2” Binary Page Size Option
“Power of 2” binary page size Configuration Register is a user-programmable nonvolatile register that allows the
page size of the main memory to be configured for binary page size (512-bytes) or standard Atmel
page size (528-bytes). The “power of 2” page size is a one-time programmable configuration register and
once the device is configured for “power of 2” page size, it cannot be reconfigured again. The devices are
initially shipped with the page size set to 528-bytes. The user has the option of ordering binary page size (512
bytes) devices from the factory. For details, please refer to
For the binary “power of 2” page size to become effective, the following steps must be followed:
If the above steps are not followed in setting the the page size prior to page programming, user may expect
incorrect data during a read operation.
Programming the Configuration Register
To program the Configuration Register for “power of 2” binary page size, the CS pin must first be asserted as it
would be with any other command. Once the CS pin has been asserted, the appropriate 4-byte opcode sequence
must be clocked into the device in the correct order. The 4-byte opcode sequence must start with 3DH and be
followed by 2AH, 80H, and A6H. After the last bit of the opcode sequence has been clocked in, the CS pin must be
deasserted to initiate the internally self-timed program cycle. The programming of the Configuration Register
should take place in a time of t
device must be power cycled after the completion of the program cycle to set the “power of 2” page size. If the
device is powered-down before the completion of the program cycle, then setting the Configuration Register
cannot be guaranteed. However, the user should check bit zero of the status register to see whether the page size
was configured for binary page size. If not, the command can be re-issued again.
Table 13-1.
Figure 13-1. Erase Sector Protection Register
CS
Command
Power of Two Page Size
CS
1. Program the one-time programmable configuration resister using opcode sequence 3DH, 2AH, 80H and
2. Power cycle the device (i.e. power down and power up again).
3. User can now program the page for the binary page size.
Atmel AT45DB161D
SI
SI
A6H (please see
Each transition
represents eight bits
Each transition
represents eight bits
Programming the Configuration Register
Opcode
Opcode
Byte 1
Section
Opcode
Byte 2
13.1).
P
, during which time the Status Register will indicate that the device is busy. The
Opcode
Byte 3
Opcode
Byte 1
Byte 4
3DH
Section 26. “Ordering Information” on page
Byte 2
2AH
Byte 3
80H
Byte 4
A6H
3500N–DFLASH–05/10
®
47.
DataFlash

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