AT45DB161D-SU Atmel, AT45DB161D-SU Datasheet - Page 20

• Manufacturer Part Number: AT45DB161D-SU
• Description: IC FLASH 16MBIT 66MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT45DB161D-SU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (4096 pages x 528 bytes)
• Speed: 66MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Architecture: Sectored
• Interface Type: SPI
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 15 mA
• Mounting Style: SMD/SMT
• Organization: 128 KB x 16
• Current, Input, Leakage: 1 μA
• Current, Operating: 11 mA (Read), 12 mA (Program/Erase)
• Current, Output, Leakage: 1
• Data Retention: 20 yrs.
• Density: 16M
• Package Type: EIAJ SOIC
• Temperature, Operating: -40 to +85 °C
• Time, Access: 6 ns
• Time, Address Hold: 5
• Time, Address Setup: 5
• Time, Fall: 6.8 ns
• Time, Rise: 6.8 ns
• Voltage, Input, High: 1.89 to 2.52 V
• Voltage, Input, Low: 0.81 to 1.08 V
• Voltage, Output, High: 2.5 V
• Voltage, Output, Low: 0.4 V
• Voltage, Supply: 2.7 to 3.6 V
• Memory Configuration: 4096 Pages X 528 Bytes
• Clock Frequency: 66MHz
• Supply Voltage Range: 2.5V To 3.6V, 2.7V To 3.6V
• Rohs Compliant: Yes
• Access Time (max): 6ns
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 15mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.3
11.4
20
Auto Page Rewrite
This mode is only needed if multiple bytes within a page or multiple pages of data are modified in a random fashion
within a sector. This mode is a combination of two operations: Main Memory Page to Buffer Transfer and Buffer to
Main Memory Page Program with Built-in Erase. A page of data is first transferred from the main memory to buffer
1 or buffer 2, and then the same data (from buffer 1 or buffer 2) is programmed back into its original page of main
memory. To start the rewrite operation for standard Atmel
58H for buffer 1 or 59H for buffer 2, must be clocked into the device, followed by three address bytes comprised of
two don’t care bits, 12 page address bits (PA11-PA0) that specify the page in main memory to be rewritten and 10
don’t care bits. To initiate an auto page rewrite for a binary page size (512-bytes), the opcode 58H for buffer 1 or
59H for buffer 2, must be clocked into the device followed by three address bytes consisting of three don’t care bits,
12 page address bits (A20 - A9) that specify the page in the main memory that is to be written and nine don’t care
bits. When a low-to-high transition occurs on the CS pin, the part will first transfer data from the page in main
memory to a buffer and then program the data from the buffer back into same page of main memory. The operation
is internally self-timed and should take place in a maximum time of t
RDY/BUSY pin will indicate that the part is busy.
If a sector is programmed or reprogrammed sequentially page by page, then the programming algorithm shown in
Figure 25-1 (page
randomly in a sector, then the programming algorithm shown in
page within a sector must be updated/rewritten at least once within every 20,000 cumulative page erase/program
operations in that sector. Please contact Atmel for availability of devices that are specified to exceed the 20K cycle
cumulative limit.
Status Register Read
The status register can be used to determine the device’s ready/busy status, page size, a Main Memory Page to
Buffer Compare operation result, the Sector Protection status or the device density. The Status Register can be
read at any time, including during an internally self-timed program or erase operation. To read the status register,
the CS pin must be asserted and the opcode of D7H must be loaded into the device. After the opcode is clocked in,
the 1-byte status register will be clocked out on the output pin (SO), starting with the next clock cycle. The data in
the status register, starting with the MSB (bit seven), will be clocked out on the SO pin during the next eight clock
cycles. After the one byte of the status register has been clocked out, the sequence will repeat itself (as long as CS
remains low and SCK is being toggled). The data in the status register is constantly updated, so each repeating
sequence will output new data.
Ready/busy status is indicated using bit seven of the status register. If bit seven is a one, then the device is not
busy and is ready to accept the next command. If bit seven is a zero, then the device is in a busy state. Since the
data in the status register is constantly updated, the user must toggle SCK pin to check the ready/busy status.
There are several operations that can cause the device to be in a busy state: Main Memory Page to Buffer
Transfer, Main Memory Page to Buffer Compare, Buffer to Main Memory Page Program, Main Memory Page
Program through Buffer, Page Erase, Block Erase, Sector Erase, Chip Erase and Auto Page Rewrite.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated using bit 6 of the status
register. If bit six is a zero, then the data in the main memory page matches the data in the buffer. If bit six is a one,
then at least one bit of the data in the main memory page does not match the data in the buffer.
Bit one in the Status Register is used to provide information to the user whether or not the sector protection has
been enabled or disabled, either by software-controlled method or hardware-controlled method. A logic 1 indicates
that sector protection has been enabled and logic 0 indicates that sector protection has been disabled.
Bit zero in the Status Register indicates whether the page size of the main memory array is configured for “power
of 2” binary page size (512-bytes) or standard DataFlash page size (528-bytes). If bit zero is a one, then the page
size is set to 512-bytes. If bit zero is a zero, then the page size is set to 528-bytes.
Atmel AT45DB161D
45) is recommended. Otherwise, if multiple bytes in a page or several pages are programmed
®
DataFlash
Figure 25-2 (page
EP
. During this time, the status register and the
®
page size (528-bytes), a 1-byte opcode,
46) is recommended. Each
3500N–DFLASH–05/10