A3985SLDTR-T Allegro Microsystems Inc, A3985SLDTR-T Datasheet - Page 4
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A3985SLDTR-T
Manufacturer Part Number
A3985SLDTR-T
Description
IC MOSFET DRVR PROG DUAL 38TSSOP
Manufacturer
Allegro Microsystems Inc
Datasheet
1.A3985SLDTR-T.pdf
(15 pages)
Specifications of A3985SLDTR-T
Configuration
H Bridge
Input Type
Non-Inverting
Delay Time
120ns
Number Of Configurations
2
Number Of Outputs
8
Voltage - Supply
12 V ~ 50 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-TSSOP
Device Type
Full Bridge
Module Configuration
Full Bridge
Peak Output Current
500nA
Output Resistance
19ohm
Input Delay
120ns
Output Delay
120ns
Supply Voltage Range
12V To 50V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Peak
-
High Side Voltage - Max (bootstrap)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
620-1180-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3985SLDTR-T
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
A3985
Continued on the next page...
Output Low Voltage
Output High Voltage
Output Leakage current
ELECTRICAL CHARACTERISTICS at T
Supply and Reference
Load Supply Voltage Range
Load Supply Current
Load Supply Idle Current
Logic Supply Voltage Range
Logic Supply Current
Logic Supply Idle Current
Regulator Output
Bootstrap Diode Forward Voltage
Gate Output Drive
Turn-On Rise Time
Turn-Off Fall Time
Turn-On Propagation Delay
Turn-Off Propagation Delay
Crossover Dead Time
Pull-Up On Resistance
Pull-Down On Resistance
Short-Circuit Current – Source
Short-Circuit Current – Sink
GHx Output Voltage
GLx Output Voltage
Logic Inputs
Input Low Voltage
Input High Voltage
Input Hysteresis
Input Current
Characteristics
1
1
1
R
R
I
Symbol
SC(source)
I
V
DS(on)UP
DS(on)DN
SC(sink)
V
t
I
V
V
t
t
V
I
I
V
DEAD
V
V
fBOOT
V
Oleak
p(on)
p(off)
BBQ
I
DDQ
V
I
V
I
REG
DD
GHx
IHys
BB
GLx
t
DD
t
IN
OH
BB
OL
r
IH
f
IL
A
= 25°C, V
SDO, I
SDO, I
SDO, STR = 1, 0 V< V
f
ENABLE = High, outputs disabled
Word1:Bit D18 = 0
Word1:Bit D18 = 0
I
I
C
C
ENABLE low to gate drive on
ENABLE high to gate drive off
f
Word1:Bits D1 and D2 = 00
I
I
CBOOTx fully charged
MCK
REGInt
fBOOT
MCK
GH
GL
LOAD
LOAD
= 25 mA
= –25 mA
DD
= 4 MHz, C
= 4 MHz,
= 10 mA
OL
OH
= 30 mA
= 1000 pF, 20% to 80%
= 1000 pF, 80% to 20%
= 5 V, V
= 0.5 mA
= –0.3 mA
Dual Full-Bridge MOSFET Driver
Test Conditions
LOAD
BB
= 12 to 50 V, unless noted otherwise
= 1000 pF
O
< V
DD
Digitally Programmable
0.7 V
V
V
11.25
V
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
–140
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
C
Min.
160
REG
150
3.0
0.6
0.5
0.2
0.5
12
80
40
30
14
–1
DD
–1
– 0.2
–
–
–
–
–
–
–
–
DD
–
–
–110
Typ.
120
120
120
200
300
0.8
60
40
19
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0.3 V
Max.
0.75
100
300
160
–80
250
5.5
0.5
50
10
10
13
80
55
24
6
1
–
–
–
–
–
–
1
1
DD
Units
mA
mA
mA
mA
mA
mV
μA
μA
μA
μA
ns
ns
ns
ns
μs
V
V
V
V
Ω
Ω
V
V
V
V
V
V
4