A3985SLDTR-T Allegro Microsystems Inc, A3985SLDTR-T Datasheet - Page 9

• Manufacturer Part Number: A3985SLDTR-T
• Description: IC MOSFET DRVR PROG DUAL 38TSSOP
• Manufacturer: Allegro Microsystems Inc

Specifications of A3985SLDTR-T

• Configuration: H Bridge
• Input Type: Non-Inverting
• Delay Time: 120ns
• Number Of Configurations: 2
• Number Of Outputs: 8
• Voltage - Supply: 12 V ~ 50 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 38-TSSOP
• Device Type: Full Bridge
• Module Configuration: Full Bridge
• Peak Output Current: 500nA
• Output Resistance: 19ohm
• Input Delay: 120ns
• Output Delay: 120ns
• Supply Voltage Range: 12V To 50V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Peak: -
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 620-1180-2

A3985
through the motor winding and the current sense resistor,
RSENSEx. When the voltage across RSENSEx equals the
DAC output voltage, the current sense comparator resets
the PWM latch, which turns off the source MOSFET (slow
decay mode) or the sink and source MOSFETs (fast decay
mode). The maximum value of current limiting is set by the
selection of R
transconductance function approximated by:
where G
(Word0: Bits D17 and D18).
The DAC output reduces the VREF output to the current
sense comparator, V
where DAC is the decimal equivalent value of the Bridge
DAC bits in the Data register (Word0: Bits D1 through D6
for Bridge 1, Bits 9 through 14 for Bridge 2). (Active codes
are represented by the values 1 through 63. Programming a
DAC input code to 0 disables the corresponding bridge, and
results in minimum load current.)
The current trip level for each DAC value then becomes:
PWM Timer Function
on the master clock. The PWM timer is programmed via the
serial port to provide fixed off-time PWM signals to the con-
trol block. The off-time, t
the Off-Time bits in the Control register (Word1, Bits D3
through D7) using the serial port. t
longer than the programmed value, to synchronize with the
master clock.
Blanking When a source driver is turned on, a current
spike occurs due to the reverse-recovery currents of the
clamp diodes and switching transients related to distributed
capacitance in the load. To prevent false overcurrent detec-
tion due to this current spike, the output from the current
sense comparator is ignored (blanked) for a duration of time
called the blank time. The blank timer runs, when a source
power MOSFET is turned on, to provide the programmable
m
is the range factor defined by in the Data register
SENSE
V
I
I
Trip(max)
TripDAC
DAC
= [(1 + DAC) × V
DAC
and the voltage at the REF input, with a
= V
= V
, in precise steps:
OFF
DAC
REF
All bridge control timing is based
, is selected by programming
/ (G
/ (G
m
m
OFF
× R
× R
REF
may be up to 1 cycle
SENSE
SENSE
] / 64 ,
) ,
) .
Dual Full-Bridge MOSFET Driver
blanking function The blank timer is reset when PHASE is
changed.
The blank time can be set to 4, 6, 8, or 12 periods of the mas-
ter clock by programming the blank time bits in the Control
register (Word1, Bits D1 and D2) using the serial port.
Dead Time
in the power full-bridge, a dead time, t
between switching one MOSFET off and switching the
complementary MOSFET on. The dead time, t
nominally half of t
synchronize with the master clock.
Mixed Decay Operation
Mixed decay is a technique that provides greater control
of phase currents while the current is decreasing. When a
stepper motor is driven at high speed, the back EMF from
the motor will lag behind the driving current. If a passive
current decay mode, such as slow decay, is used in the cur-
rent control scheme, then the motor back EMF can cause the
phase current to rise out of control. Mixed decay eliminates
this effect by putting the full-bridge initially into fast decay,
and then switching to slow decay after some time. Because
fast decay is an active (driven) decay mode, this portion of
the current decay cycle will ensure that the current remains
in control. Using fast decay for the full current decay time
(off-time, t
switching to slow decay once the current is in control will
reduce the ripple current value. The portion of the off-time
that the full-bridge has to remain in fast decay will depend
on the characteristics and the speed of the motor.
When the phase current is rising, the motor back EMF does
not affect the current control, and slow decay may be used
to minimize the phase current ripple. The A3985 must be
programmed to switch between slow decay, when the cur-
rent is rising, and mixed decay, when the current is falling.
To simplify this programming sequence the decay mode is
included in the data word (Word0) with the phase current trip
level and the phase current direction.
When mixed decay is used, the portion of the off-time that
the full-bridge remains in fast decay, t
OFF
To prevent cross-conduction (shoot through)
) would result in a large ripple current, but
Digitally Programmable
BLANK ,
but may be up to 1 cycle longer to
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
FD
DEAD
, is selected by pro-
, is introduced
DEAD
, is
9