ISL88550AIRZ Intersil, ISL88550AIRZ Datasheet - Page 15

• Manufacturer Part Number: ISL88550AIRZ
• Description: IC PWM CONTROLLER 28TQFN
• Manufacturer: Intersil

Specifications of ISL88550AIRZ

• Applications: PWM Controller
• Voltage - Input: 2 ~ 25 V
• Current - Supply: 25µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

POR, UVLO and Soft-Start
Internal Power-on reset (POR) occurs when AV
above approximately 2V, resetting the fault latch and the
soft-start counter, powering up the reference and preparing
the Buck Regulator for operation. Until AV
(typical), AV
switching. The controller inhibits switching by pulling UGATE
low and holding LGATE low when OVP and shutdown
discharge are disabled (OVP/UVP = REF or GND) or forcing
LGATE high when OVP and shutdown discharge are
enabled (OVP/UVP = AV
detailed truth table for OVP/UVP and Shutdown settings.
When AV
Buck Regulator and initializes the internal soft-start. The
Buck Regulator’s internal soft-start allows a gradual increase
of the current limit level during start-up to reduce the input
surge currents. The ISL88550A divides the soft-start period
into five phases. During the first phase, the controller limits
the current limit to only 20% of the full current limit. If the
FIGURE 24. VALLEY CURRENT-LIMIT THRESHOLD
DD
DD
rises above 4.25V, the controller activates the
undervoltage lockout (UVLO) circuitry inhibits
+
+
R
-
-
LX
DD
9R
or OPEN). See Table 3 for
I
15
LOAD(MAX)
1.0V
FIGURE 23. ADJUSTABLE CURRENT LIMIT THRESHOLD
DD
I
I
I
PEAK
LOAD
LIMIT
reaches 4.25V
DD
rises
Δ I
ISL88550A
+
-
ISL88550A
+
-
VDD - 1V
output does not reach regulation within 425µs, soft-start
enters the second phase and the current limit is increased by
another 20%. This process repeats until the maximum
current limit is reached after 1.7ms, or when the output
reaches the nominal regulation voltage, whichever occurs
first. Adding a capacitor in parallel with the external ILIM
resistors creates a continuously adjustable analog soft-start
function for the Buck Regulator’s output.
For most applications, LDO soft-start is not necessary
because output charging current is limited to approximately
3.0A. For 20µF LDO output capacitors, the minimum rise
time is about 30µs. However, soft-start in the LDO section
can be realized by tying a capacitor between the SS pin and
GND. When STBY# is driven low, or during thermal
shutdown of the LDO’s, the SS capacitor is discharged.
When STBY# is driven high or when the thermal limit is
removed, an internal 4µA (typical) current charges the SS
capacitor. The resulting linear ramp voltage on SS linearly
increases the current-limit comparator thresholds to both the
VTT and VTTR outputs until full current limit is attained when
SS reaches approximately 1.6V. This lowering of the current
limit during start-up limits the initial in-rush current peaks,
particularly when driving higher output capacitances. For
good tracking, choose the value of the SS capacitor less
than 390pF. Leave SS floating to disable the soft-start
feature.
Power OK (POK1)
POK1 is an open-drain output for a window comparator that
continuously monitors V
SHDNA# is low and during the Buck Regulator outputs
soft-start. After the digital soft-start terminates, POK1
becomes high impedance as long as the output voltage is
within ±10% of the nominal regulation voltage set by FB.
When V
OUT
REF
ILIM
drops 10% below or rises 10% above the
OUT
R
R
A
B
. POK1 is actively held low when
C REF
C ILIM
April 23, 2008
FN6168.3