TLE6361G Infineon Technologies, TLE6361G Datasheet - Page 55

• Manufacturer Part Number: TLE6361G
• Description: IC PS SYSTEM MULTI VOLT PDSO-36
• Manufacturer: Infineon Technologies
• Type: Step-Down (Buck)r

Specifications of TLE6361G

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 4
• Voltage - Output: 5.4 ~ 6.05 V
• Current - Output: 1.5A
• Frequency - Switching: 370kHz
• Voltage - Input: 5.5 ~ 60 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-36
• Output Voltage: 5.5 V
• Output Current: 1.5 A
• Input Voltage Max: 60 V
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 150 C
• Output Voltage Tolerance: +/- 10 %
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: SP000013297; TLE6361GNT; TLE6361GT

TLE 6361 G
5.8
Layout recommendation
The most sensitive points for Buck converters - when considering the layout - are the
nodes at the input and the output of the Buck switch, the DMOS transistor.
For proper operation the external catch diode and Buck inductance have to be
connected as close as possible to the SW pins (29, 31). Best suitable for the connection
of the cathode of the Schottky diode and one terminal of the inductance would be a small
plain located next to the SW pins.
The GND connection of the catch diode must be also as short as possible. In general the
GND level should be implemented as surface area over the whole PCB as second layer,
if necessary as third layer.
The pin FB/L_IN is sensitive to noise. With an appropriate layout the Buck output
capacitor helps to avoid noise coupling to this pin. Also filtering of steep edges at the
supply voltage pin e.g. as shown in the application diagram is mandatory. C
may either
I2
be a low ESR Tantalum capacitor or a ceramic capacitor. A minimum capacitance of
10µF is recommended for C
.
I2
To obtain the optimum filter capability of the input -filter it has to be located also as
close as possible to the IN pins, at least the ceramic capacitor C
should be next to those
I3
pins.
Data Sheet, Rev. 2.0
55
2005-03-01