TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 113
TMP86C909XB
Manufacturer Part Number
TMP86C909XB
Description
EMULATION CHIP FOR TMP86F SDIP
Manufacturer
Toshiba
Datasheet
1.TMP86C909XB.pdf
(201 pages)
Specifications of TMP86C909XB
Accessory Type
Adapter
For Use With/related Products
TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.1 Configuration
Example :After checking high-frequency clock oscillation stability with TC4 and 3, switching to the NORMAL1 mode
9.3.9.2
Table 9-9 Setting Time in High-Frequency Warm-Up Counter Mode
PINTTC4:
VINTTC4:
bility is obtained. Before starting the timer, set SYSCR2<XEN> to 1 to oscillate the high-frequency clock.
When a match between the up-counter and the timer register (TTREG4, 3) value is detected after the timer
is started by setting TC4CR<TC4S> to 1, the counter is cleared by generating the INTTC4 interrupt
request. After stopping the timer in the INTTC4 interrupt service routine, clear SYSCR2<SYSCK> to 0 to
switch the system clock from the low-frequency to high-frequency, and then SYSCR2<XTEN> to 0 to
stop the low-frequency clock.
(SLOW1 → SLOW2 → NORMAL2 → NORMAL1)
High-Frequency Warm-Up Counter Mode
In this mode, the warm-up period time from a stop of the high-frequency clock fc to the oscillation sta-
Minimum time (TTREG4, 3 = 0100H)
SET
LD
LD
LD
DI
SET
EI
SET
CLR
CLR
CLR
RETI
DW
:
:
16 µs
(SYSCR2).7
(TC3CR), 63H
(TC4CR), 05H
(TTREG3), 0F800H
(EIRH). 3
(TC4CR).3
(TC4CR).3
(SYSCR2).5
(SYSCR2).6
PINTTC4
:
:
Page 102
: SYSCR2<XEN>
: Sets TFF3=0, source clock fs, and 16-bit mode.
: Sets TFF4=0, and warm-up counter mode.
: Sets the warm-up time.
: IMF
: Enables the INTTC4.
: IMF
: Starts the TC4 and 3.
: Stops the TC4 and 3.
: SYSCR2<SYSCK>
: SYSCR2<XTEN>
: INTTC4 vector table
(The warm-up time depends on the oscillator characteristic.)
(Switches the system clock to the high-frequency clock.)
(Stops the low-frequency clock.)
←
←
Maximum time (TTREG4, 3 = FF00H)
0
1
←
←
←
1
4.08 ms
0
0
TMP86F409NG
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