TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 63
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TMP86C909XB
Manufacturer Part Number
TMP86C909XB
Description
EMULATION CHIP FOR TMP86F SDIP
Manufacturer
Toshiba
Datasheet
1.TMP86C909XB.pdf
(201 pages)
Specifications of TMP86C909XB
Accessory Type
Adapter
For Use With/related Products
TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 63 of 201
- Download datasheet (2Mb)
5.3 P2 (P22 to P20) Port
5.3 P2 (P22 to P20) Port
Read only
(000DH)
(0002H)
P2PRD
frequency resonator connecting pin. When using this port as an input port or function pin, set the output latch to 1.
The output latch is initialized to 1 when reset. When operating in dual-clock mode, connect a low-frequency resona-
tor (32.768 kHz) to the P21 (XTIN) and P22 (XTOUT) pins. When operating in single-clock mode, the P21 and P22
pins can be used as ordinary input/output ports. We recommend using the P20 pin for external interrupt input or
STOP canceling signal input or as an input port. (When used as an output port, the interrupt latch is set by a falling
edge.)
inspect the pin status, read the P2PRD register. When the P2DR or P2PRD read instruction is executed for the P2
port, the values read from bits 7 to 3 are indeterminate.
P2DR
R/W
The P2 port is a 3-bit input/output port shared with external interrupt input, STOP canceling signal input, and low-
The P2 port has independent data input registers. To inspect the output latch status, read the P2DR register. To
Note: The P20 pin is shared with the
Data input (P20PRD)
Data input (P21PRD)
Data input (P22PRD)
OUTEN status.
Data input (P20)
Data input (P21)
Data input (P22)
7
7
Control input
Data output
Data output
Data output
ST P
UTEN
XTEN
6
6
fs
5
5
utput latch
utput latch
utput latch
D
D
D
STOP
4
4
Q
Q
Q
pin, so that when in STOP mode, its output goes to a High-Z state regardless of the
Figure 5-4 P2 Port
3
3
Page 52
XTOUT
P22
P22
2
2
XTIN
P21
P21
1
1
sc. enable
STOP
P20
INT5
P20
0
0
(Initial value: **** *111)
P20 (INT5, ST P)
P21 (XTIN)
P22 (XT UT)
TMP86F409NG
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