TMP86C993XB Toshiba, TMP86C993XB Datasheet - Page 160
TMP86C993XB
Manufacturer Part Number
TMP86C993XB
Description
EMULATION CHIP FOR TMP86F SSOP
Manufacturer
Toshiba
Datasheet
1.TMP86C993XB.pdf
(246 pages)
Specifications of TMP86C993XB
Accessory Type
Adapter
For Use With/related Products
TMP86F SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.9
Bus Driver Protection
14.9
14.8.3
Bus Driver Protection
fault error occurs, the SEI immediately performs the following operations: The SOVF flag is set if the following
conditions are both met:
SECR register. Once the SESR<MODF> flag is cleared, the mode setting can be made again.
between the SCLK pin and MOSI pin drivers if two or more devices on the same bus are set as the master at the
same time. (It is not possible to prevent the collision of the MISO pins if the SS pins of two or more slave devices
on the same bus are simultaneously driven low.)
・ One method to protect the device against latch-up due to collision of the bus drivers is the use of an open-
・ When using the SEI pins as CMOS outputs, we recommend connecting them to the bus via resistors in order
When the SEI device is set as the master, a mode fault error occurs if the SS pin is driven low. When a mode
The SESR<MODF> flag thus set is automatically cleared by a read of the SESR register and a write to the
When open-drain output mode is selected, this mode fault error function can be used to prevent the collision
Mode fault error
drain option. This means changing the SEI pins’ CMOS outputs to the open-drain type, which is accomplished
by setting the SCLK, MOSI, and MISO pins for open-drain individually by using the each Port Input/output
Control Register. In this case, these pins must be provided with pull-up resistors external to the chip.
to protect the device against collision of drivers. However, be sure to select the appropriate resistance value
which will not affect actual device operation (Example: 1 Ω to several kΩ).
・ Clears the SECR<MSTR> bit to 0 to set the SEI device as a slave.
・ Clears the SECR<SEE> bit to 0 to disable SEI operation.
・ Sets the SESR<MODF> flag to 1 to generate an INTSEI0 interrupt pulse.
・ Sets the SCLK and MOSI pins to output 1. (These pins become high-impedance in open-drain output
mode, or high level in CMOS output mode.)
Page 146
TMP86FH92DMG
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