TMP86C993XB Toshiba, TMP86C993XB Datasheet - Page 28
TMP86C993XB
Manufacturer Part Number
TMP86C993XB
Description
EMULATION CHIP FOR TMP86F SSOP
Manufacturer
Toshiba
Datasheet
1.TMP86C993XB.pdf
(246 pages)
Specifications of TMP86C993XB
Accessory Type
Adapter
For Use With/related Products
TMP86F SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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2.2
System Clock Controller
(a) Single-clock mode
(b) Dual-clock mode
Note 1: NORMAL1 and NORMAL2 modes are generically called NORMAL; SLOW1 and SLOW2 are called SLOW; IDLE0,
Note 2: The mode is released by falling edge of TBTCR<TBTCK> setting.
2.2.3.4
IDLE1 and IDLE2 are called IDLE; SLEEP0, SLEEP1 and SLEEP2 are called SLEEP.
Operating Mode Transition
SLEEP2
SLEEP1
IDLE1
IDLE2
mode
mode
mode
mode
Figure 2-6 Operating Mode Transition Diagram
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<TGHALT> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<SYSCK> = "0"
SYSCR2<XTEN> = "0"
SYSCR2<XEN> = "1"
Interrupt
Interrupt
Interrupt
Interrupt
Note 2
Page 14
NORMAL1
NORMAL2
SLEEP0
SLOW2
SLOW1
IDLE0
mode
mode
mode
mode
mode
mode
SYSCR2<XTEN> = "1"
SYSCR2<SYSCK> = "1"
SYSCR2<XEN> = "0"
Note 2
SYSCR2<TGHALT> = "1"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
STOP pin input
STOP pin input
STOP pin input
Reset release
TMP86FH92DMG
RESET
STOP
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