Z8FMC160100KIT Zilog, Z8FMC160100KIT Datasheet - Page 135
![KIT DEV FOR Z8 ENCORE Z8FMC16100](/photos/9/6/90634/z8fmc160100kit_sml.jpg)
Z8FMC160100KIT
Manufacturer Part Number
Z8FMC160100KIT
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KIT.pdf
(20 pages)
Specifications of Z8FMC160100KIT
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphic User Interface
Processor To Be Evaluated
Z8FMC16100
Data Bus Width
8 bit
Interface Type
USB
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3639
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Z8FMC16100 Series Flash MCU
Product Specification
123
LIN-UART Overrun Errors
When an overrun error condition occurs the LIN-UART prevents overwriting of the valid
data currently in the Receive Data register. The Break Detect and Overrun status bits are
not displayed until the valid data has been read.
After the valid data has been read, the
bit of the Status 0 register is updated to indicate
OE
the overrun condition (and Break Detect, if applicable). The
bit is set to 1 to indicate
RDA
that the Receive Data register contains a data byte. However, because the overrun error
occurred, this byte may not contain valid data and must be ignored. The
bit indicates
BRKD
if the overrun is caused due to a break condition on the line. After reading the status byte
indicating an overrun error, the Receive Data register must be read again to clear the error
bits in the LIN-UART Status 0 register.
In LIN mode, an Overrun Error is signaled for receive data overruns as described above
and in the LIN Slave if the BRG Counter overflows during the autobaud sequence (the
bit will also be set in this case). There is no data associated with the autobaud
ATB
overflow interrupt, however the Receive Data register must be read to clear the
bit. In
OE
this case software must write a 10B to the
field, forcing the LIN slave back to a
LinState
Wait for Break state.
LIN-UART Data-Handling and Error-Handling Procedure
Figure 16
displays the recommended procedure for use in LIN-UART receiver interrupt
service routines.
PS024613-0910
LIN-UART Interrupts
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