Z8FMC160100KIT Zilog, Z8FMC160100KIT Datasheet - Page 77
![KIT DEV FOR Z8 ENCORE Z8FMC16100](/photos/9/6/90634/z8fmc160100kit_sml.jpg)
Z8FMC160100KIT
Manufacturer Part Number
Z8FMC160100KIT
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KIT.pdf
(20 pages)
Specifications of Z8FMC160100KIT
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphic User Interface
Processor To Be Evaluated
Z8FMC16100
Data Bus Width
8 bit
Interface Type
USB
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3639
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- Download datasheet (5Mb)
Pulse Width Modulator
PS024613-0910
Architecture
The Z8FMC16100 Series Flash MCU includes a Pulse-Width Modulator (PWM) optimized
for Motor Control applications. The PWM features include:
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The PWM unit consists of a master timer to generate the modulator time base and six
independent compare registers to set the pulse-width modulation for each output. The six
outputs are designed to provide control signals for inverter drive circuits. The outputs are
grouped into pairs consisting of a High driver and a Low driver output. The output pairs are
programmable to operate independently or as complementary signals. In complementary
output mode, a programmable dead time is inserted to ensure non-overlapping signal transi-
tions. The master count and compare values feed into modulator logic that generates the
proper transitions in the output states. Output polarity and fault/OFF state control logic
allows programming of the default OFF states, which forces the outputs to a safe state in
the event a fault in the motor drive is detected.
6 independent PWM outputs or 3 complementary PWM output pairs
Programmable deadband insertion for complementary output pairs
Edge-aligned or center-aligned PWM signal generation
PWM OFF state is option-bit-programmable
PWM outputs driven to OFF state on System Reset
Asynchronous disabling of PWM outputs on system fault; outputs are forced to OFF
state
FAULT inputs generate pulse-by-pulse or hard shutdown
12-bit reload counter with 1-, 2-, 4-, or 8-bit programmable clock prescaler
High current source and sink on all PWM outputs
When outputs are disabled, PWM pairs are used as general-purpose inputs
ADC synchronized with PWM period
Narrow pulse suppression with programmable threshold
Z8FMC16100 Series Flash MCU
Product Specification
Architecture
65
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