Z8FMC160100KIT Zilog, Z8FMC160100KIT Datasheet - Page 52
![KIT DEV FOR Z8 ENCORE Z8FMC16100](/photos/9/6/90634/z8fmc160100kit_sml.jpg)
Z8FMC160100KIT
Manufacturer Part Number
Z8FMC160100KIT
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KIT.pdf
(20 pages)
Specifications of Z8FMC160100KIT
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphic User Interface
Processor To Be Evaluated
Z8FMC16100
Data Bus Width
8 bit
Interface Type
USB
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3639
- Current page: 52 of 383
- Download datasheet (5Mb)
Table 17. Port A–C Control Registers (PxCTL)
Table 18. Port A–C Data Direction Subregisters
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024613-0910
Port A–C Control Registers
DD7
R/W
7
7
1
If 01H in Port A–C Address register, accessible through the Port A-C Control register
The Port A–C Control registers (PxCTL) set the GPIO port operation. The value in the
corresponding Port A–C Address register determines the control subregisters accessible
using the Port A–C Control registers
to all subregisters that configure GPIO port operation.
Port A–C Data Direction Subregisters
The Port A–C Data Direction subregisters are accessed through the Port A–C Control
registers by writing
In each of these three data direction subregisters, bits [7:0] control the direction of the
associated port pin. Port Alternate Function operation overrides the Data Direction register
setting.
If the value of bit is 0, the direction is output, and data in the Port A–C Output Data
registers is driven onto the port pin.
If the value of bit is 1, the direction is input. The port pin is sampled, the value is written
into the Port A–C Input Data registers, and the output driver is tristated.
DD6
R/W
6
6
1
01h
DD5
R/W
5
5
1
to the Port A–C Address registers. See
FD1H, FD5H, FD9H
DD4
R/W
4
4
1
(Table
PCTL
R/W
00H
17). The Port Control registers provide access
DD3
R/W
3
3
1
Z8FMC16100 Series Flash MCU
DD2
R/W
2
2
1
Table
Product Specification
Port A–C Control Registers
18.
DD1
R/W
1
1
1
DD0
R/W
0
0
1
40
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